u-boot.git/arch/arm/cpu, branch v2019.01

watchdog: imx: add config to disable wdog reset

2019-01-01T13:12:18Z

Add Kconfig option WATCHDOG_RESET_DISABLE to disable watchdog reset in imx_watchdog driver, so that the watchdog will not be fed in u-boot if CONFIG_WATCHDOG_RESET_DISABLE is enabled. Signed-off-by: Xiaoliang Yang

watchdog: driver support for fsl-lsch2

2019-01-01T13:12:18Z

Support watchdog driver for fsl-lsch2. It's disabled in default. If you want to use it, please enable CONFIG_IMX_WATCHDOG. Define CONFIG_WATCHDOG_TIMEOUT_MSECS to set watchdog timeout. Signed-off-by: Xiaoliang Yang

armv8: lx2160a: Add LX2160A SoC Support

2018-12-06T22:37:19Z

LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei Signed-off-by: Hou Zhiqiang Signed-off-by: Meenakshi Aggarwal Signed-off-by: Vabhav Sharma Signed-off-by: Sriram Dash Signed-off-by: Priyanka Jain Reviewed-by: York Sun

armv8:fsl-layerscape: Add support for Chassis 3.2

2018-12-06T22:37:19Z

NXP layerscape architecture Chassis 3.2 builds upon chassis3 architecture with changes like DDR Memory map change, removal of IFC and support of upto 8 I2C controller. Patch add README.lsch3_2 and the above changes under macro CONFIG_NXP_LSCH3_2. Signed-off-by: Sriram Dash Signed-off-by: Priyanka Jain Reviewed-by: York Sun

armv8: lsch3: Add support of serdes3 module

2018-12-06T22:37:19Z

Some lsch3 based SoCs like lx2160a contains three serdes modules. Add support for third serdes protocol in lsch3 Signed-off-by: Priyanka Jain Reviewed-by: York Sun

armv8: fsl-layerscape: add support of MC framework for TFA

2018-12-06T22:37:19Z

Add support of MC framework for TFA Make MC framework independent of boot source. Signed-off-by: Rajesh Bhagat Signed-off-by: Pankit Garg Reviewed-by: York Sun

armv8: sec_firmware: return job ring status as true in TFABOOT

2018-12-06T22:37:19Z

Returns job ring status as true in TFABOOT, as one job ring is always reserved. Signed-off-by: Ruchika Gupta Signed-off-by: Pankit Garg Reviewed-by: York Sun

armv8: sec_firmware: change el2_to_aarch32 SMC ID

2018-12-06T22:37:19Z

Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17, it is applicable to both TFA and non-TFA boot. Signed-off-by: Rajesh Bhagat Reviewed-by: York Sun

armv8: fsl-layerscape: Update parsing boot source

2018-12-06T22:37:19Z

Workaround of erratum A010539 clears the RCW source field in PORSR1 register, causing failure of detecting boot source using this method. Use SMC call if U-Boot runs at EL2. If SMC is not implemented or running at EL3, continue to read PORSR1 and presume QSPI as boot source if erratum workaround A010539 is enabled and RCW source is cleared. Signed-off-by: York Sun

armv8: layerscape: skip OCRAM init for TFABOOT

2018-12-06T22:37:19Z

OCRAM initialization is performed by TFA, Hence skipped from u-boot. Signed-off-by: Ruchika Gupta Reviewed-by: York Sun