u-boot.git/arch/arm/cpu, branch v2019.10

armv8: ls1028a: Updated serdes configuration for 0x13BB

2019-09-12T10:45:42Z

In SerDes protocol 0x13BB, lane C was erroneously assigned to PCIE1, this is now updated to PCIE2 Fixes: 36f50b75238e ("armv8: ls1028a: Add other serdes protocal support") Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain

armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entry

2019-09-12T10:45:42Z

The correct config entry is CONFIG_PCIE_LAYERSCAPE and this typo results in skipping the fixup of Linux PCIe DT nodes. Also enable the fixup when Layerscape Gen4 controller driver is enabled. Fixes: 4da0e52c9dc0 (armv8: fsl-layerscape: fix config dependency for layerscape pci code) Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng Reviewed-by: Priyanka Jain

armv8: fsl-layerscape: Update I2C clock divider

2019-09-12T10:45:42Z

By default, i2c input clock is programmed at platform clk / 2 in u-boot, but this is not correct for all the platforms, Update I2C clock divider's default values as per SoC (LS1012A, LS1028A, LX2160A and LS1088A). Signed-off-by: Chuanhua Han Reviewed-by: Priyanka Jain

armv8: ls1028a: configure PMU's PCTBENR to enable WDT

2019-09-12T10:45:42Z

The SP805-WDT module on LS1028A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Thomas Schaefer Signed-off-by: Zhao Qiang Reviewed-by: Priyanka Jain

fsl-layerscape: Add fsl_esdhc peripheral clock support

2019-09-12T08:30:35Z

Add esdhc peripheral clock support for NXP layerscape platforms: LS1046ARDB, LS1043ARDB, LS1012ARDB, LS1028ARDB, LS1088ARDB, LX2160ARDB Signed-off-by: Yinbo Zhu Signed-off-by: Priyanka Jain

drivers/fsl-mc: Create Kconfig file to manage driver specific configs better

2019-09-04T16:37:19Z

Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig Signed-off-by: Florinel Iordache Acked-by: Joe Hershberger

armv8: ls1028a: add icid setup for platform devices

2019-08-22T03:37:36Z

Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, edma, qdma, gpu, display and sec. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha

armv8: ls1088a: add icid setup for platform devices

2019-08-22T03:37:36Z

Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, sec. The ICID macros for SEC needed to be adapted because the format of the registers is different. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha

armv8: fsl-layerscape: make icid setup endianness aware

2019-08-22T03:37:36Z

The current implementation assumes that the registers holding the ICIDs are universally big endian. That's no longer the case on newer platforms so update the code to take into account the endianness of each register. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha

armv8: kconfig: Fix some platforms incorrect I2C clock divider

2019-08-22T03:37:36Z

By default, i2c input clock is platform clk / 2, but some of the platform of i2c clock divider does not meet this kind of circumstance, so alone to set default values for these platforms. Signed-off-by: Chuanhua Han Reviewed-by: Prabhakar Kushwaha