u-boot.git/arch/arm/cpu, branch v2021.07Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2021.072021-06-17T06:16:11Zarmv8: Update erratum number to align with doc2021-06-17T06:16:11ZRan Wangran.wang_1@nxp.com2021-06-16T12:23:19Zurn:sha1:390c73b41757f7a69987ed75dc0b44d630d67700
Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.
Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
armv8: ls1012a: Pass PPFE firmware to Linux through FDT2021-06-17T06:16:11ZChaitanya Sakinamchaitanya.sakinam@nxp.com2021-05-07T04:22:05Zurn:sha1:ff64e9a9f0f48107a46536c251951885df63d63f
Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
armv8: layerscape: enable eMMC HS400 workarounds for LX2160A/LX2162A2021-06-17T06:16:11ZYangbo Luyangbo.lu@nxp.com2021-04-27T08:42:11Zurn:sha1:addec3511f7c389353884026435488d3d552e6a9
Enable eMMC HS400 workarounds for LX2160A/LX2162A.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
armv8: layerscape: add PSCI support for cpu release2021-06-17T06:16:11ZJiafei PanJiafei.Pan@nxp.com2021-04-21T04:12:49Zurn:sha1:84c2e044a9372945c5ef6b83ab49f9cb2ba74c0d
For cpu release command, check whether PSCI is supported firstly,
if supported, use PSCI to kick off secondary cores, otherwise still
use spin table.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
[Fixed checkpatch alignment CHECKs]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
armv8: SPL: discard relocation information2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:24:20Zurn:sha1:37de198fa25b4bd31c69d14bad4fa6904685836d
For some reason when building SPL for ARMv8 with LTO, the relocation
information is not discarded.
Discard it explicitly in the linker script.
This fixes LTO build for imx8mm_venice_defconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
ARM: kona: fix clk_bsc_enable() type mismatch for LTO2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:24:15Zurn:sha1:3cd7541f932164db34c82748dc5ead4020a0eb2e
When building with LTO, the compiler complains about type mismatch of
function clk_bsc_enable() in file:
arch/arm/cpu/armv7/kona-common/clk-stubs.c
vs other files that define or use this function:
warning: type of ‘clk_bsc_enable’ does not match original declaration.
Change the type of this function to that of the other usages.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ARM: fix LTO for imx28_xea2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:24:12Zurn:sha1:b83120df7923eb572ab6d88505f234b6784a2b6b
When imx28_xea_defconfig is built with LTO, the compiler complains about
the two different declarations of _start:
include/asm-generic/sections.h as extern void _start(void);
arch/arm/cpu/arm926ejs/mxs/mxs.c as extern uint32_t _start;
Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ARM: fix LTO build for some thumb-interwork cases2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:24:11Zurn:sha1:e5fc9037dd3391a63cf6f6f7da015507ae12158d
Fix LTO build for some thumb-interwork usecases (such as for
da850evm_defconfig), where inline assmebly such as
mrc p15,0,r2,c1,c0,0
causes the compiler to fail during LTO linking with
Error: selected processor does not support `mrc p15,0,r2,c1,c0,0'
in Thumb mode
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
ARM: make gd a function call for LTO and set via set_gd()2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:24:10Zurn:sha1:86c5e21013d5efd895de9905a19893b4403e4642
On ARM, the gd pointer is stored in registers r9 / x18. For this the
-ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global
register variables causes errors when building with LTO, and these
errors are very difficult to overcome.
Richard Biener says [1]:
Note that global register vars shouldn't be used with LTO and if they
are restricted to just a few compilation units the recommended fix is
to build those CUs without -flto.
We cannot do this for U-Boot since all CUs use -ffixed-reg flag.
It seems that with LTO we could in fact store the gd pointer differently
and gain performance or size benefit by allowing the compiler to use
r9 / x18. But this would need more work.
So for now, when building with LTO, go the clang way, and instead of
declaring gd a global register variable, we make it a function call via
macro.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
treewide: Convert macro and uses of __section(foo) to __section("foo")2021-05-24T18:21:30ZMarek Behúnmarek.behun@nic.cz2021-05-20T11:23:52Zurn:sha1:236f2ec43266cb4dabd320381498df6c9d80c82d
This commit does the same thing as Linux commit 33def8498fdd.
Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.
Remove the quote operator # from compiler_attributes.h __section macro.
Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>