u-boot.git/arch/arm/cpu, branch v2022.04

sunxi: f1c100s: Fix FEL registers restore

2022-03-03T01:24:06Z

Commit 88998f777531 ("arm: arm926ej-s: Add sunxi code") introduced the ARM926 version of the code to save and restore some FEL state, to be able to return to the BROM FEL code after the SPL has run. However during review a change was made, that happened to mess up the register restore part, so SCTLR and CPSR ended up with the wrong values, breaking return to FEL. Use the same offset that we actually save those registers to, to make FEL booting actually work on the Lichee Pi Nano. Signed-off-by: Andre Przywara

spl: Provide more space to be used for storing SPL on imx28 OCRAM

2022-02-05T12:38:39Z

With the current configuration provided in mxsimage{-spl}.mx28.cfg the size of SPL binary has been constrained to 32 KiB, due to "LOAD IVT" command with 0x8000 offset. The problem was that, the imx28 ROM takes the u-boot.sb and then extracts from it the IVT header and places it on the 0x8000 OCRAM offset overwriting any valid (i.e. loaded from eMMC or SPI-NOR) SPL code. This bug was unnoticed as the overwrite size was just 32 bytes, so the probability that some important code is altered was low. However, in the XEA board (where the SPL size is ~39KiB), the overwritten data was `(struct dm_spi_ops *) 0x800c `, which is used during the boot process. As a result the SPL execution code hanged with "undefined instruction" abort as callbacks (with wrong addresses) from it were called. The fix is to change the OCRAM's offset where IVT is loaded to 0xE000, so the SPL can grow up to ~57KiB (the maximal size of OCRAM memory available is 0xE3FC). Signed-off-by: Lukasz Majewski

mxs: power: Change sequence of enabling DCDC switches

2022-02-05T12:38:38Z

The imx28 uses following voltage supplies hierarchy: VDD_5V (VDD_BAT) -> VDDIO -> VDDA -> VDDMEM \-----> VDDD One shall first enable DCDC on the parent source (VDDIO) and then follow with its children. Signed-off-by: Lukasz Majewski Reviewed-by: Jaehoon Chung Reviewed-by: Fabio Estevam

Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

2022-02-04T04:24:31Z

This is the promised second part of the sunxi PR for 2022.04, albeit technially outside of the merge window. We were working on this full steam since the beginning of the year, and it deserves to be merged, I think. The main attraction is support for the F1C100s SoC, which sports a venerable ARM926 core. Support for this SoC and the LicheePi Nano board has been in Linux for years, and U-Boot patches were posted mid last year already. The new SoC using ARMv5 also means that the bulk of the new code should not touch any existing boards, although we did some refactorings first, of course, which actually cleans up some existing sunxi code. Compile tested for all 160 sunxi boards, and briefly tested on BananaPi M1, OrangePi Zero, Pine64 and Pine-H64. Tested by others on their boards, including F1C100s and F1C200s devices.

arm: arm926ej-s: Add sunxi code

2022-02-04T00:09:57Z

Some Allwinner SoCs use ARM926EJ-S core. Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory. Signed-off-by: Icenowy Zheng Reviewed-by: Andre Przywara Signed-off-by: Jesse Taube Signed-off-by: Andre Przywara

mach-sunxi: Move timer code to mach folder

2022-02-04T00:09:57Z

Both armv7 and arm926ejs use this timer code so move it to mach-sunxi. Signed-off-by: Jesse Taube Reviewed-by: Andre Przywara Signed-off-by: Andre Przywara

arm: arm926ej-s: start.S: port save_boot_params support from armv7 code

2022-02-04T00:09:57Z

The ARMv7 start code has support for saving some boot params at the entry point, which is used by some SoCs to return to BROM. Port this to ARM926EJ-S start code. Signed-off-by: Icenowy Zheng Reviewed-by: Andre Przywara Signed-off-by: Jesse Taube Signed-off-by: Andre Przywara

armv8: remove no longer needed lowlevel_init.S

2022-02-04T00:09:57Z

When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara Reviewed-by: Samuel Holland Reviewed-by: Simon Glass Tested-by: Simon Glass

sunxi: move early "SRAM setup" into separate file

2022-02-04T00:09:57Z

Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara Reviewed-by: Simon Glass Tested-by: Simon Glass

sunxi: move Cortex SMPEN setting into start.S

2022-02-04T00:09:36Z

According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara