u-boot.git/arch/arm/cpu, branch v2022.07

sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform

2022-06-26T10:22:54Z

linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao Signed-off-by: Andre Przywara

armv8: always use current exception level for TCR_ELx access

2022-06-16T19:22:55Z

Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara Reviewed-by: Mark Kettenis Tested-by: Mark Kettenis

caam: Fix crash in case caam_jr_probe failed

2022-05-20T10:36:47Z

If probing caam_jr returns failure, the variable "dev" will not be initialized, so we can't use dev->name for the error print. Otherwise it will cause crash. Signed-off-by: Ye Li Reviewed-by: Gaurav Jain

armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUs

2022-04-26T11:43:57Z

NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES) that can be configured for the application. Interfaces not used by the application can be set to protocol 0 to turn them off and save power, but U-Boot would emit a warning that 0 was invalid for a SERDES protocol on boot. Replace the warning text with a notice that the SERDES is disabled. Signed-off-by: Stephen Carlson Reviewed-by: Priyanka Jain

armv8: layerscape: fix the function mismatch issue

2022-04-26T11:43:57Z

Signed-off-by: Yuantian Tang Reviewed-by: Andre Przywara Reviewed-by: Priyanka Jain

armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig option

2022-04-26T11:43:57Z

There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the same meaning but is just for the ls1043ardb board. As no in-tree config uses this, drop it and replace it with something more sophiticated: ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE option which is used as the base to relocate the PSCI code (or any code in the secure region, but that is only PSCI). A SoC (or board) can now opt-in into having such a secure region by enabling SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was possible to relocate the PSCI code before as well as on the LS1028A SoC where there will be PSCI support soon. Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive. Signed-off-by: Michael Walle Reviewed-by: Priyanka Jain

armv8: psci: skip setup code if we are not EL3

2022-04-26T11:43:57Z

If we are running in EL2 skip PSCI implementation setup. This avoids an exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A. Signed-off-by: Michael Walle Reviewed-by: Priyanka Jain

armv8: layerscape: get rid of smc_call()

2022-04-26T11:43:57Z

There are two different implementations to do a secure monitor call: smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and seems to be an ad-hoc implementation. The latter is imported from linux. smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined. This makes it impossible to have both PSCI calls and PSCI implementation in one u-boot build. The layerscape SoC code decide at runtime via check_psci() if there is a PSCI support. Therefore, this is a prerequisite patch to add PSCI implementation support for the layerscape SoCs. Note, for the TFA part, this is only compile time tested with (ls1028ardb_tfa_defconfig). Signed-off-by: Michael Walle [Rebased] Signed-off-by: Priyanka Jain

armv8: include psci_update_dt() unconditionally

2022-04-26T11:43:57Z

psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is, if u-boot is the PSCI provider. Guard the check which is intended to call into the PSCI implementation in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI. Mark the function as weak because - unfortunately - there is already a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c which does not the same as the common one. Signed-off-by: Michael Walle Reviewed-by: Priyanka Jain

arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A

2022-04-26T11:42:32Z

This erratum is reported to cause problems on these processors [1-3]. The problem is usually with the clocking, which is supposed to be configured by the RCW [4]. However, if it is not set, or if the default clocking is not correct, then this erratum will cause an SError. However, according to Ran Wang in [1]: " ... this erratum is used to pass USB compliance test only, you could disable this workaround on your board if you don't any USB issue on normal use case, I think it's fine." So just disable this erratum by default for these processors. [1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/ [2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993 [3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412 [4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw Signed-off-by: Sean Anderson Acked-by: Ran Wang [Rebased] Signed-off-by: Priyanka Jain