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<title>u-boot.git/arch/arm/cpu, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2023.01</id>
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<updated>2022-11-10T15:08:55Z</updated>
<entry>
<title>global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:13Z</published>
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<id>urn:sha1:6cc04547cb3bbd3a3d78947f200acbae19e3c67f</id>
<content type='text'>
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE</title>
<updated>2022-10-31T15:01:31Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-10-21T00:22:39Z</published>
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<id>urn:sha1:984639039f4cfe32ec2cc531d6ace05326ac49eb</id>
<content type='text'>
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: layerscape: Disable unused parts of ICID tables</title>
<updated>2022-10-18T01:32:52Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-10-17T15:45:11Z</published>
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<id>urn:sha1:3ed84e73fb59c592c4cdfe3b56cce5cecf30a7da</id>
<content type='text'>
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: layerscape: Don't select FSL_IFC when booting from SD card</title>
<updated>2022-10-18T01:32:51Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-10-17T15:45:10Z</published>
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<id>urn:sha1:3d970cb264ba2dd9b84fa689b397cd93ac939ac9</id>
<content type='text'>
FSL_IFC should only be selected when booting from NAND flash (or when
NAND_FSL_IFC is enabled). The existing logic does this correctly when
QSPI is also enabled, but not when just booting from SD.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: layerscape: Support SYSRESET</title>
<updated>2022-10-17T07:17:56Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-09-26T16:47:37Z</published>
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<id>urn:sha1:8fd111351ce61106c14bcf7efa9af9724c9dd92f</id>
<content type='text'>
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable
our version when it is enabled.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: ls104x: Enable eDMA snooping</title>
<updated>2022-10-17T07:17:56Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-09-23T16:05:51Z</published>
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<id>urn:sha1:0c3eec2aea8fba147c9eee48577f1dcab57c1174</id>
<content type='text'>
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: cache_v8: Fix pgtables setup when MMU is already enabled</title>
<updated>2022-10-07T01:05:17Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-09-14T11:37:46Z</published>
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<id>urn:sha1:ae17910117f3ae5957eb1d7498710f881a091155</id>
<content type='text'>
When MMU is already enabled then dcache_enable() does not call mmu_setup()
and so setup_all_pgtables() is also never called.

In this situation when some driver calls mmu_set_region_dcache_behaviour()
function then U-Boot crashes with error message:

    Emergency page table not setup.

Fix this issue by explicitly calling setup_all_pgtables() in dcache_enable()
function near condition for mmu_setup().

This change fixes chainloading U-Boot from U-Boot on Turris Mox board which
uses mvneta ethernet driver which calls mmu_set_region_dcache_behaviour().

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Reviewed-by: Marek Behún &lt;kabel@kernel.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ARMv8/sec_firmware: Convert to use fit_get_data_conf_prop</title>
<updated>2022-09-07T05:40:45Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-08-16T15:16:04Z</published>
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<id>urn:sha1:bdbdaede671c5ad7b71737bd345e03eb7e99266d</id>
<content type='text'>
This reduces sec_firmware_get_data to a single call to
fit_get_data_conf_prop. I think sec_firmware_check_copy_loadable could also
be converted, but it does not map as straightforwardly, so I have left it
for a future cleanup.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>ARMv8/sec_firmware: Remove SEC_FIRMWARE_FIT_CNF_NAME</title>
<updated>2022-09-07T05:40:43Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-08-16T15:16:02Z</published>
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<id>urn:sha1:1b0e98221d826776adc8e3c5d939cfee1890398e</id>
<content type='text'>
The config to use for FIT images can be better specified by enabling
CONFIG_MULTI_DTB_FIT and implementing board_fit_config_name_match.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: layerscape: spl: mark OCRAM as non-secure</title>
<updated>2022-09-06T01:10:41Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2022-08-23T09:30:14Z</published>
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<id>urn:sha1:6622c30f2e033eb4268720c1927a52062406f870</id>
<content type='text'>
By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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