<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/cpu, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2025-11-11T17:54:56Z</updated>
<entry>
<title>ARM: Fix HAS_ARMV7_SECURE_BASE help text</title>
<updated>2025-11-11T17:54:56Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-11-09T18:45:41Z</published>
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<id>urn:sha1:aa99fc54ed6177f25a6d987dfc8def813784de50</id>
<content type='text'>
Drop the 'a' from 'ahardware', no functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>armv8: implement workaround for broken CNTFRQ_EL0 value</title>
<updated>2025-11-06T14:19:19Z</updated>
<author>
<name>Kaustabh Chakraborty</name>
<email>kauschluss@disroot.org</email>
</author>
<published>2025-10-22T21:02:57Z</published>
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<id>urn:sha1:c9b43591ea5c63d09310713068d9aa7a924ab983</id>
<content type='text'>
In devices where the U-Boot is used as a secondary bootloader, we rely
on the device's primary bootloader to implement CNTFRQ_EL0. However,
this reliance may lead to a non-functional timer in broken firmware.

For instance, some versions of Samsung's S-Boot don't implement it. It's
also not possible to set it in the U-Boot, because it's booted in a lower
exception level. CNTFRQ_EL0 is reported to be 0.

Use gd-&gt;arch.timer_rate_hz to override the queried value if set. This
setting needs to be done in the board file, preferrably in timer_init().
This feature is present only when the CONFIG_ARMV8_CNTFRQ_BROKEN is
enabled.

Signed-off-by: Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;
</content>
</entry>
<entry>
<title>arm: armv8: mmu: fix mem_map_from_dram_banks</title>
<updated>2025-11-04T16:39:06Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-10-31T16:17:31Z</published>
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<id>urn:sha1:45b7857d3b5b4cb12a5cc0a121bc8ac4b57427fa</id>
<content type='text'>
mem_map_from_dram_banks calls fdtdec_setup_memory_banksize to setup the
dram banks though that is expected to be done by dram_init_banksize as
part of board_r sequence.

This has the side effect of modifying gd-&gt;bd-&gt;bi_dram as well, therefore
this patch removes the call and updates spl_enable_cache for K3 to call
dram_init_banksize.

Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reported-by: Francesco Dolcini &lt;francesco@dolcini.it&gt;
Closes: https://lore.kernel.org/u-boot/20251027165225.GA71553@francesco-nb/
Fixes: fe2647f2a0d4 ("arm: armv8: mmu: add mem_map_from_dram_banks")
Tested-by: Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;
</content>
</entry>
<entry>
<title>arm: armv8: Make save_boot_params simpler</title>
<updated>2025-10-24T19:47:50Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2025-10-16T13:27:43Z</published>
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<id>urn:sha1:104a0de7844eee51d183d92f5bd22fa6202bb699</id>
<content type='text'>
The idiom used in save_boot_params is common for armv7.
In armv8 is much easier to do the same thing with adr/adrp.

So let's simplify the code a bit.

Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>spl: split spl_board_fixups to arch/board specific</title>
<updated>2025-10-22T18:05:52Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-10-17T13:15:30Z</published>
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<id>urn:sha1:16ffcff0283d2f10821bad7cbcf89003a86c0063</id>
<content type='text'>
The current spl_board_fixups API allows for modification of spl_image
before the SPL jumps to it. This can be used to modify the DT for the
next boot stage, however the current API only allows either the machine
arch or the board to use it.

This limits the utility of the API as there might be certain fixups that
should be applied to all boards sharing the same machine architecture
with others being board specific.

For TI's K3 specifically, this prevents us from performing architecture
level fixups since a lot of TI boards are already making use of the
spl_board_fixups API.

Therefore this patch splits the API into two to allow both board and the
architecture specific fixups. The order is kept as arch then board to
give board specific fixups the precedence.

Reviewed-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>arm: armv8: mmu: add mmu_unmap_reserved_mem</title>
<updated>2025-10-22T18:05:52Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-10-17T13:15:29Z</published>
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<id>urn:sha1:856480eef0a25dde339cce6d1889efdc836c6be8</id>
<content type='text'>
For armv8, U-Boot uses a static map defined as 'mem_map' for configuring
the MMU's page tables, done by mmu_setup.

Though this works well for simpler platforms, it makes creating runtime
carveouts by modifying the static array at runtime exceedingly complex
like in mach-snapdragon/board.c.

Creation of such carveouts are much better handled by APIs such as
mmu_change_region_attr once the page tables are configured. Usually such
carveouts are configured via the device-tree's reserved-memory node
which provides the address and size for the carveout.

Therefore this patch adds mmu_unmap_reserved_mem which acts as a wrapper
over mmu_change_region_attr, helping unmap a reserved-memory region.

Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>arm: armv8: mmu: add mem_map_from_dram_banks</title>
<updated>2025-10-22T18:05:52Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-10-17T13:15:27Z</published>
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<id>urn:sha1:fe2647f2a0d4e4df5d47fdf068aeb2a1edd3d533</id>
<content type='text'>
For armv8, U-Boot uses a static map defined as 'mem_map' for configuring
the MMU as part of mmu_setup.

But since the exact configuration of memory banks might not be known at
build time, many platforms such as imx9, versal2 etc. utilize
gd-&gt;bd-&gt;bi_dram to configure the static map at runtime.

Therefore this patch adds a new API mem_map_from_dram_banks that
modifies the static map in a similar way. Allowing the caller to map all
dram banks by just passing the index to last entry in their mem_map and
it's length.

Reviewed-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>arm: armv8: invalidate dcache entries on dcache_enable</title>
<updated>2025-10-22T18:05:52Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-10-17T13:15:26Z</published>
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<id>urn:sha1:9ebdbbc43e5fb5841d85ec7ebcb1dbf07f4c87b0</id>
<content type='text'>
In dcache_enable, currently the dcache entries are only invalidated when
the MMU is not enabled. This causes issues when dcache_enable is called
with the MMU already configured, in such cases the existing dcache
entries are not flushed which might result in un-expected behavior.

This patch invalidates the cache entries on every call of dcache_enable
before enabling dcache (by setting CR_C). This makes dcache_enable
behave similar to icache_enable as well.

Reviewed-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>arm: armv8: remove redundant definition of mmu_status</title>
<updated>2025-10-03T21:13:58Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2025-09-16T11:22:05Z</published>
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<id>urn:sha1:8fd3768ca1683b45aeb5662094de6bcffdb7735b</id>
<content type='text'>
mmu_status is used in io memcpy functions to prevent accesses to non
8-byte aligned addresses when the mmu is disabled. Though there is a
redundant definition enabled when icaches is turned off by setting
SYS_ICACHE_OFF.

This patch removes the redundant definition, allowing mmu_status to
properly report the status regardless of config settings. This shouldn't
be a problem since access to non 8-byte aligned data can be done
irrespective of icache state.

Fixes: 268f6ac1f95c ("arm64: Update memcpy_{from, to}io() helpers")

Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Reviewed-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Acked-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v2025.10-rc5' into next</title>
<updated>2025-09-23T14:24:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-09-23T14:24:59Z</published>
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<id>urn:sha1:b82a1fa7ddc7f3be2f3b75898d5dc44c34420bdd</id>
<content type='text'>
Prepare v2025.10-rc5
</content>
</entry>
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