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<title>u-boot.git/arch/arm/dts, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/dts?h=v2015.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/dts?h=v2015.01'/>
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<updated>2015-01-08T18:50:38Z</updated>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-spi</title>
<updated>2015-01-08T18:50:38Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2015-01-08T18:50:38Z</published>
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<id>urn:sha1:f10d86d3fff9f53723a404b3794cca98a785ce6a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>dt: socfpga: Replace num-chipselect with num-cs</title>
<updated>2015-01-07T06:43:30Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-12-31T19:14:56Z</published>
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<id>urn:sha1:653cda8f6605676504d03eb76f84932a20a6feb1</id>
<content type='text'>
This optional DT property is called 'num-cs', so repair the misnomers.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@opensource.altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi</title>
<updated>2015-01-06T10:32:58Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-12-31T19:14:55Z</published>
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<id>urn:sha1:741148625359ef92ad078b1096e3352cdb36dd0d</id>
<content type='text'>
Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@opensource.altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>cros-ec-keyboard: Synchronize DT binding from linux</title>
<updated>2015-01-06T00:45:16Z</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2014-11-27T15:34:08Z</published>
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<id>urn:sha1:9332274989009b213a405134202088e1bd81fe51</id>
<content type='text'>
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit &amp; bindings documentation from
linux and include it in all 3 boards.

This slightly changes the dt bindings in u-boot:
  * google,key-rows becomes keypad,num-rows
  * google,key-colums becomes keypad,num-colums
  * google,repeat-delay-ms and google,repeat-rate-ms are no longer used
    and replaced by hardcoded values (similar to tegra kbc)

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-tegra</title>
<updated>2015-01-01T20:10:39Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2015-01-01T20:10:39Z</published>
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<id>urn:sha1:a74a4a86a53726ba17de8ab863bec1cd60cf545e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>odroid-XU3: Add entry for DTS EHCI GPIO</title>
<updated>2014-12-22T11:48:01Z</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2014-12-05T20:26:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce88a25cc28a5ad76826c3ed0270d274bbd84de9'/>
<id>urn:sha1:ce88a25cc28a5ad76826c3ed0270d274bbd84de9</id>
<content type='text'>
Add samsung,vbus-gpio information for the XU3. This allows the usage of
the EHCI controller on the XU3, which is connected to the SMSC LAN9514
chip (usb hub + network).

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>Exynos5800: The Peach-Pi board does not have a Parade video bridge</title>
<updated>2014-12-22T11:38:22Z</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2014-12-05T17:12:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=307e90e6179e46197e701e216767408c8ef6d010'/>
<id>urn:sha1:307e90e6179e46197e701e216767408c8ef6d010</id>
<content type='text'>
Unlike the Peach-Pit board, there is no parade edp to lvds bridge on the
Pi. So drop it from  device-tree

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>Odroid-XU3: Add support for Odroid-XU3</title>
<updated>2014-12-22T11:37:10Z</updated>
<author>
<name>Hyungwon Hwang</name>
<email>human.hwang@samsung.com</email>
</author>
<published>2014-12-12T05:45:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6207604f9cae9d74cd2b9daaeac3f076d797e17d'/>
<id>urn:sha1:6207604f9cae9d74cd2b9daaeac3f076d797e17d</id>
<content type='text'>
This patch adds support for Odroid-XU3.

Signed-off-by: Hyungwon Hwang &lt;human.hwang@samsung.com&gt;
Reviewed-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Tested-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Kevin Hilman &lt;khilman@linaro.org&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Enable PCIe on Jetson TK1</title>
<updated>2014-12-18T20:19:21Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:21Z</published>
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<id>urn:sha1:6e2fca94ff4f754024e46e7d986221a75be611f3</id>
<content type='text'>
The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes
the second root port to a miniPCIe slot. Enable the PCIe controller and
the network driver to allow the device to boot over the network.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Add Tegra124 PCIe device tree node</title>
<updated>2014-12-18T20:19:21Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c46e6cb454cc2ab81ca59f94944e7208d0cfb95'/>
<id>urn:sha1:9c46e6cb454cc2ab81ca59f94944e7208d0cfb95</id>
<content type='text'>
Add the device tree node for the PCIe controller found on Tegra124 SoCs.

Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
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