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<title>u-boot.git/arch/arm/dts, branch v2017.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/dts?h=v2017.05</id>
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<updated>2017-04-27T11:31:55Z</updated>
<entry>
<title>zynq-topic-miami.dts: Add usbotg0 alias to make USB actually work</title>
<updated>2017-04-27T11:31:55Z</updated>
<author>
<name>Mike Looijmans</name>
<email>mike.looijmans@topic.nl</email>
</author>
<published>2017-04-10T06:56:22Z</published>
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<id>urn:sha1:79ed06f2ccad476b4c10df9f5a0255e104d2e06e</id>
<content type='text'>
Fixes the following problem:
zynq-uboot&gt; run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19

The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.

Signed-off-by: Mike Looijmans &lt;mike.looijmans@topic.nl&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-sunxi</title>
<updated>2017-04-25T20:12:42Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-04-25T20:12:42Z</published>
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<id>urn:sha1:6f008a2e16ec3b618363800e414023569007cd89</id>
<content type='text'>
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</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-socfpga</title>
<updated>2017-04-25T12:59:56Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-04-25T12:59:56Z</published>
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<id>urn:sha1:9ad99bee9c6d840be89334fc16e7d04e350ce8c5</id>
<content type='text'>
</content>
</entry>
<entry>
<title>arm: socfpga: add cyclone5 based de10-nano board</title>
<updated>2017-04-25T10:46:44Z</updated>
<author>
<name>Dalon Westergreen</name>
<email>dwesterg@gmail.com</email>
</author>
<published>2017-04-18T15:11:16Z</published>
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<id>urn:sha1:6bd041f00d5d80761852eae1ecb7879a27f3c289</id>
<content type='text'>
Add support for the Terasic DE10-Nano board.  The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.

Signed-off-by: Dalon Westergreen &lt;dwesterg@gmail.com&gt;
Reviewed-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>sunxi: add support for Lichee Pi Zero</title>
<updated>2017-04-21T07:29:35Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.xyz</email>
</author>
<published>2017-04-08T07:30:14Z</published>
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<id>urn:sha1:f02abb0608fe7e47fa1ee62e0f7655d7e0e53a12</id>
<content type='text'>
Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.

Add support for it.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>sunxi: add DTSI file for V3s</title>
<updated>2017-04-21T07:23:27Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.xyz</email>
</author>
<published>2017-04-08T07:30:13Z</published>
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<id>urn:sha1:e267d94011cde1d841106d0b6505dbd63f57d944</id>
<content type='text'>
As we have now V3s support in board code, the V3s DTSI file should also
be added.

Add also some CCU include headers to satisfy the DTSI file.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.xyz&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: uniphier: sync Device Tree with Linux</title>
<updated>2017-04-20T14:50:02Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-04-20T07:54:44Z</published>
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<id>urn:sha1:4e7f8de42642cd0036dc78bf0df293f105cb5267</id>
<content type='text'>
- Use - instead of @ for OPP tables
 - Add input-delay properties to Cadence eMMC nodes
 - Restore full license text because code-diff is annoying
 - Fix NAND compatible strings

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>sunxi: Add support for Bananapi M2 Ultra</title>
<updated>2017-04-20T11:30:01Z</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-12-02T08:12:32Z</published>
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<id>urn:sha1:10d8bc5a5968a118c6562c25ecf6f83b5f29b7ed</id>
<content type='text'>
The Bananapi M2 Ultra is the first publicly available development board
featuring the R40 SoC.

This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra,
as well as a defconfig for it.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2017-04-18T15:36:06Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-04-18T15:36:06Z</published>
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<id>urn:sha1:3c476d841daa491f87c8f07851038afbdf4d90a8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>armv7: ls1021a: Drop macro CONFIG_LS102XA</title>
<updated>2017-04-17T16:03:30Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-03-27T18:41:03Z</published>
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<id>urn:sha1:73fb583829efb296ecdddb08c426e2261cb84d0a</id>
<content type='text'>
Use CONFIG_ARCH_LS1021A instead.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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