u-boot.git/arch/arm/include/asm/arch-exynos/cpu.h, branch main

ARM: exynos: move SoC sources to mach-exynos

2015-08-17T04:06:52Z

Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang Cc: Albert Aribaud Cc: Masahiro Yamada Signed-off-by: Thomas Abraham Reviewed-by: Masahiro Yamada Tested-by: Przemyslaw Marczak Acked-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang

arm: exynos: USB3 PHY base definition for Exynos5 SoCs

2015-06-08T13:25:41Z

After that change it would be possible to call samsung_get_base_usb3_phy() function to get proper base address Signed-off-by: Lukasz Majewski Cc: Minkyu Kang

Exynos542x: CPU: Power down all secondary cores

2015-02-28T09:03:46Z

This patch adds code to shutdown secondary cores. When U-boot comes up, all secondary cores appear powered on, which is undesirable and causes side effects while initializing these cores in kernel. Secondary core power down happens in following steps: Step-1: After Exynos power-on, primary core starts executing first. Step-2: In iROM code every core has to check 2 flags i.e. addresses 0x02020028 & 0x02020004. Step-3: Initially 0x02020028 is 0 for all cores and 0x02020004 has a jump address for primary core and 0 for all secondary cores. Step-4: Therefore, primary core follows normal iROM execution and jumps to BL1 eventually, whereas all secondary cores enter WFE. Step-5: When primary core comes into function secondary_cores_configure, it puts pointer to function power_down_core into 0x02020004 and provides DSB and SEV for all cores so that they may come out of WFE and jump to power_down_core function. Step-6: And ultimately because of power_down_core all secondary cores shut-down. Signed-off-by: Kimoon Kim Signed-off-by: Akshay Saraswat Signed-off-by: Minkyu Kang

Exynos5800: Introduce new proid for Exynos5800

2014-11-17T10:03:38Z

This patch intends to add a new proid for Exynos5800 which is a variant of Exynos5420. Product id for Exynos5800 is 0x5422. Both Exynos5420 and Exynos5800 are pin to pin compitable. This gives us an advantage of reusing Exynos5420 clock, pinmux, memory and other settings. Signed-off-by: Alim Akhtar Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Minkyu Kang

exynos4/4x12: cpu: add extra gpio base addresses

2014-10-30T10:56:16Z

After remove the offsets in Exynos4/4x12 gpio enums, an additional gpio base addresses are required. Signed-off-by: Przemyslaw Marczak Acked-by: Simon Glass Signed-off-by: Minkyu Kang

S5P: Exynos: Add GPIO pin numbering and rename definitions

2014-05-13T06:20:38Z

This patch includes following changes : * Adds gpio pin numbering support for EXYNOS SOCs. To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. * Rename GPIO definitions from GPIO_... to S5P_GPIO_... These changes were done to enable cmd_gpio for EXYNOS and cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence getting a error during compilation. * Adds support for name to gpio conversion in s5p_gpio to enable gpio command EXYNOS SoCs. Function has been added to asm/gpio.h to decode the input gpio name to gpio number. Example: SMDK5420 # gpio set gpa00 Signed-off-by: Leela Krishna Amudala Signed-off-by: Rajeshwari Shinde Signed-off-by: Akshay Saraswat Acked-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang

cpu: exynos4: add ace sha base address

2014-03-28T19:06:31Z

Signed-off-by: Przemyslaw Marczak Cc: Minkyu Kang

arm:exynos: add cpu revision

2014-02-07T01:06:24Z

This patch enables to read cpu revision on Exynos CPU. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang

Exynos5420: Add DDR3 initialization for 5420

2013-12-30T07:50:34Z

This patch intends to add DDR3 initialization code for Exynos5420. Signed-off-by: Akshay Saraswat Signed-off-by: Rajeshwari S Shinde Acked-by: Simon Glass Signed-off-by: Minkyu Kang

Exynos5420: Add base addresses for 5420

2013-12-30T07:50:34Z

Adds base addresses of various IPs and controllers required for Exynos5420. Signed-off-by: Rajeshwari S Shinde Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang