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<title>u-boot.git/arch/arm/include/asm/arch-imx/cpu.h, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-imx/cpu.h?h=v2016.09</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-imx/cpu.h?h=v2016.09'/>
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<updated>2016-03-09T11:50:39Z</updated>
<entry>
<title>mx7: Distinguish between dual and solo versions</title>
<updated>2016-03-09T11:50:39Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2016-02-28T15:33:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e25a0656bac63c5fcd20ef4313dc09c409fc512d'/>
<id>urn:sha1:e25a0656bac63c5fcd20ef4313dc09c409fc512d</id>
<content type='text'>
Read the number of cores in the fuses to distinguish between
the dual and solo versions.

Tested on a mx7d sabresd and on a mx7solo warp7.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: cpu: move common chip revision id's</title>
<updated>2015-10-30T14:20:56Z</updated>
<author>
<name>Adrian Alonso</name>
<email>aalonso@freescale.com</email>
</author>
<published>2015-10-12T18:48:07Z</published>
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<id>urn:sha1:fc5ad4778d91dabbeca3bc05a78cb669686f0a9c</id>
<content type='text'>
Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision

Signed-off-by: Adrian Alonso &lt;aalonso@freescale.com&gt;
</content>
</entry>
<entry>
<title>imx: imx7d: Add SoC system support</title>
<updated>2015-09-13T08:11:53Z</updated>
<author>
<name>Adrian Alonso</name>
<email>aalonso@freescale.com</email>
</author>
<published>2015-09-02T18:54:19Z</published>
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<id>urn:sha1:c5752f73a53a8396aae1efa51c5af14b21210b3a</id>
<content type='text'>
Add imx7d basic SoC system support
Misc arch dependent functions for system bring up

Signed-off-by: Adrian Alonso &lt;aalonso@freescale.com&gt;
Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Signed-off-by: Ye.Li &lt;B37916@freescale.com&gt;
</content>
</entry>
<entry>
<title>imx: arch-mx6: add is_soc_type helper macro</title>
<updated>2015-09-13T08:11:52Z</updated>
<author>
<name>Adrian Alonso</name>
<email>aalonso@freescale.com</email>
</author>
<published>2015-09-02T18:54:12Z</published>
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<id>urn:sha1:15c52b3ddd1e46743f5fb604f0cbcae144237ed5</id>
<content type='text'>
Add helper macro is_soc_type to identify iMX SoC family

Signed-off-by: Adrian Alonso &lt;aalonso@freescale.com&gt;
</content>
</entry>
<entry>
<title>imx: vf610 add get_cpu_rev</title>
<updated>2015-09-02T13:39:51Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-09-01T09:15:03Z</published>
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<id>urn:sha1:37cf215253a488ba6b903989b1eff072f59d266e</id>
<content type='text'>
Since we need to support runtime check for different drivers, we need
to add get_cpu_rev for vf610, otherwise there will be build errors.

This patch introduces a dummy CPU id which is not read from chip
silicon. Later when we can get the real id from chip, can fix the
value of MXC_CPU_VF610 then.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Suggested-by: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: add cpu type for i.MX2 and i.MX3</title>
<updated>2015-09-02T13:29:14Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-08-13T02:55:30Z</published>
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<id>urn:sha1:c398e7503db15b7bddf543e54e14bc8e2765670d</id>
<content type='text'>
Add cpu types for i.MX2/3.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Reviewed-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6ul: Add i.MX6UL CPU type</title>
<updated>2015-08-02T09:05:06Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-07-20T11:28:21Z</published>
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<id>urn:sha1:8631c06e9b8563f8196ba26333c8f3a80bf45517</id>
<content type='text'>
Add MXC_CPU_MX6UL for i.MX6UL CPU type which is got at runtime from
DIGPROG register. But the value has been occupied by MXC_CPU_MX6D which
is not real id from DIGPROG register, so change i.MX6D to value 0x67 which
was not occupied.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Signed-off-by: Ye.Li &lt;B37916@freescale.com&gt;
</content>
</entry>
<entry>
<title>imx: add cpu type for i.MX6QP/DP</title>
<updated>2015-08-02T08:42:48Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-07-11T03:38:42Z</published>
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<id>urn:sha1:d0acd99334a74b345429ab81b2039e2b4ede7208</id>
<content type='text'>
Add cpu type for i.MX6QP/DP.

This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP
and MXC_CPU_MX6DP, we should use:
(is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)).

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: i.MX: provide access to reset cause through get_imx_reset_cause()</title>
<updated>2015-02-17T09:42:54Z</updated>
<author>
<name>Eric Nelson</name>
<email>eric.nelson@boundarydevices.com</email>
</author>
<published>2015-02-15T21:37:21Z</published>
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<id>urn:sha1:11c2e505c4505a8c709cfa65675ba07aedec4e76</id>
<content type='text'>
Signed-off-by: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
</content>
</entry>
<entry>
<title>imx: consolidate set_chipselect_size function</title>
<updated>2014-11-20T09:30:19Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2014-11-14T13:27:21Z</published>
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<id>urn:sha1:32c81ea65cc01103d3a615072690e7b5faf76656</id>
<content type='text'>
Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</content>
</entry>
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