u-boot.git/arch/arm/include/asm/arch-imx8ulp/sys_proto.h, branch main

imx: fix header inclusion guards

2023-05-31T14:11:46Z

It seems like the header inclusion guards for some IMX related headers were misspelled or got out of sync. Make the preprocessor symbols for the #ifndef and #define lines the same, so that the double inclusion protection works as expected. Signed-off-by: Andre Przywara Reviewed-by: Tom Rini

imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion

2023-03-29T18:15:42Z

To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment. M33 will be the TRDC owner and needs to configure TRDC. A35 is the XRDC owner, ATF will configure XRDC. The handshake between U-boot and M33 image is used to sync TRDC and XRDC configuration completion. Once the handshake is done, A35 and M33 can access the allowed resources in others domain. The handshake is needed when M33 is booted or DBD_EN fused, because both cases will enable the TRDC. If handshake is timeout, the boot will hang. We use SIM GPR0 to pass the info from SPL to u-boot, because before the handshake, u-boot can't access SEC SIM and FSB. Signed-off-by: Ye Li Reviewed-by: Jacky Bai

imx: imx8ulp: Get chip revision from Sentinel

2023-03-29T18:15:41Z

In both SPL and u-boot, after probing the S400 MU, get the chip revision, lifecycle and UID from Sentinel. Update get_cpu_rev to use the chip revision not hard coded it for A0 Signed-off-by: Ye Li Reviewed-by: Peng Fan

imx: imx9: support romapi

2022-07-26T09:29:00Z

i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function prototype common and usable by i.MX9. Also include mmc env functions that use ROM API. Signed-off-by: Peng Fan

imx: move get_boot_device to common header

2022-07-26T09:29:00Z

Most i.MX implements get_boot_device, move it to common header to simplify code Signed-off-by: Peng Fan

imx: imx8ulp: Add M33 handshake functions

2022-04-12T15:33:56Z

Add functions to check if M33 image is booted and handshake with M33 image via MU. A core notifies M33 to start init by FCR F0, then wait M33 init done signal by checking FSR F0. Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Biwen Li Signed-off-by: Peng Fan

imx8ulp: Workaround LPOSC_TRIM fuse load issue

2022-02-05T12:38:39Z

8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0 LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision. A0.2 will fix the issue in ROM. But A0.1 we have to workaround it in SPL by setting LPOSCCTRL BIASCURRENT again. Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan

imx8ulp: Fix DCNANO QoS setting

2022-02-05T12:38:38Z

The setting does not have effect because we should set it after power on the PS16 for NIC AV. So move it after upower_init which has powered on all PS Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan

arm: iMX8ULP: Add boot device relevant functions

2021-08-09T12:46:51Z

Read from ROM API to get current boot device. Signed-off-by: Ye Li Signed-off-by: Peng Fan

arm: imx8ulp: add rdc support

2021-08-09T12:46:51Z

There is xrdc inside i.MX8ULP, we need to configure permission to make sure AP non-secure world could access the resources. Signed-off-by: Peng Fan