u-boot.git/arch/arm/include/asm/arch-mx6, branch v2012.07Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-mx6?h=v2012.072012-07-20T21:03:28Zmx6: Make pad name macro consistent with the datasheet2012-07-20T21:03:28ZAshokashokkourla2000@gmail.com2012-06-15T03:48:57Zurn:sha1:6b8ac524e7bcfd4853bb4f494e539a63d894a46f
Use the same name as defined in the datasheet.
DSP_CLK -> DISP_CLK
Signed-off-by: Ashok Kumar Reddy Kourla <ashokkourla2000@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
mx6: Allow mx6 to access the IPUv3 registers2012-07-10T09:35:38ZFabio Estevamfabio.estevam@freescale.com2012-05-31T07:23:55Zurn:sha1:05d4df1d8a955228968fe9e9382f335950670cdd
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly2012-07-07T12:07:25ZJason Liujason.hui@linaro.org2012-04-11T01:18:02Zurn:sha1:0d952e5d2eef9320338a87007959ce0d80a264e3
If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
i.MX6: add enable_sata_clock()2012-05-15T06:31:33ZEric Nelsoneric.nelson@boundarydevices.com2012-03-27T09:52:21Zurn:sha1:64e7cdb5e8fe082b0afd4438a58c4d8a70a1a3d6
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
i.MX6: Add ANATOP regulator init2012-05-15T06:31:33ZDirk Behmedirk.behme@de.bosch.com2012-05-02T02:12:17Zurn:sha1:cac833a98cf7e111bd07b15fe59ef85fca1c46e7
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The bootloader
prevents access to the ANATOP registers.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
imx-common: Factor out get_ahb_clk()2012-05-15T06:31:32ZFabio Estevamfestevam@gmail.com2012-04-29T08:11:13Zurn:sha1:6a376046ef3b2417cf9fbfbfad300fa6f026c816
get_ahb_clk() is a common function between mx5 and mx6.
Place it into imx-common directory.
Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
imx: Remove unneeded/repititive definitions from imx headers2012-04-16T12:53:59ZVikram Narayananvikram186@gmail.com2012-04-10T04:25:57Zurn:sha1:a9407f2bc51ed118c47a2e60396466bba78c57a6
Remove gpio related unused/repititive definitions from imx headers.
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
i.MX6: define CACHELINE_SIZE2012-04-16T12:53:58ZEric Nelsoneric.nelson@boundarydevices.com2012-03-04T11:47:37Zurn:sha1:c415919d5790977b2d498105c5dc3475bb0895e6
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
mx6: Read silicon revision from register2012-03-27T07:41:16ZFabio Estevamfabio.estevam@freescale.com2012-03-20T04:21:45Zurn:sha1:a7683867463481bfea84af4d60af832ddfb3da7f
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo
or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
mx6: Remove duplicate definition of ANATOP_BASE_ADDR2012-03-27T07:41:16ZFabio Estevamfabio.estevam@freescale.com2012-03-13T07:26:49Zurn:sha1:334bd0e225ade19f3a3ac91e4f89fe8a2c6ea0b5
Remove duplicate definition of ANATOP_BASE_ADDR.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>