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<title>u-boot.git/arch/arm/include/asm/arch-mx6, branch v2016.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-mx6?h=v2016.03</id>
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<updated>2016-02-21T10:46:26Z</updated>
<entry>
<title>imx: mx6: implement functions to boot auxiliary core</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:05Z</published>
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<id>urn:sha1:0623d375cfa9593260c0e6bfe404b38d3d5c7c7c</id>
<content type='text'>
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.

arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6sx Add RDC mappings of masters and peripherals</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:01Z</published>
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<id>urn:sha1:d08607e1e7b05f86f81e21601f6012d20ae1c397</id>
<content type='text'>
Add the definitions for the RDC mappings for i.MX6 SoloX.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: imx-common: introduce Resource Domain Controller support</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:00Z</published>
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<id>urn:sha1:de09c43bbfeeae767a8561d2810df55675e8b1a4</id>
<content type='text'>
Introduce Resource Domain Controller support for i.MX.
Now i.MX6SX and i.MX7D supports this feature to assign masters
and peripherals to different domains.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6: introduce rdc regs</title>
<updated>2016-02-21T10:46:25Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:54:59Z</published>
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<id>urn:sha1:613e01065a17e17af9b6ab5b41c976a03990cc1a</id>
<content type='text'>
Introudce rdc regs structure and rdc sema reg structure for i.MX6.
For now, to i.MX6, only i.MX6SX supports this.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>mx6: soc: Add ENET2 mac address support</title>
<updated>2016-02-02T20:03:59Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2016-02-01T02:41:31Z</published>
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<id>urn:sha1:d4d1dd674977fc7be30bd1f113b564247236ed60</id>
<content type='text'>
The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading
MAC address from fuse for ENET2.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL</title>
<updated>2016-02-02T19:58:46Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-12-16T14:40:06Z</published>
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<id>urn:sha1:d339f16911c790196f5aaea3682819b9c03633bb</id>
<content type='text'>
Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
fine-tunes the behavior of the MMDC controller in order to improve
the signal integrity and memory stability.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6ul/sx: fix mmdc_ch0 clk calculation</title>
<updated>2016-01-24T11:13:21Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-06T03:06:31Z</published>
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<id>urn:sha1:9ba18ff8efcc471635fb2768509fed025fa7db3c</id>
<content type='text'>
Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
Processor Reference Manual and "Figure 18-5. BUS clock generation" of
i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk
sources from pll4_main_clk(pll_audio), the calculation is wrong.

Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
for decode_pll.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6: add more entry for mxc_ccm_reg</title>
<updated>2016-01-24T11:12:27Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-06T03:06:30Z</published>
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<id>urn:sha1:234dc6330126e2c16f45821be9f52862aecda030</id>
<content type='text'>
Add more entries for structure mxc_ccm_reg.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Eric Nelson &lt;eric@nelint.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6: fix reg base address when runtime usage</title>
<updated>2015-12-07T14:03:08Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-11-30T08:04:51Z</published>
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<id>urn:sha1:0c890879fe2a5731df7aee3dd38e455008fa9977</id>
<content type='text'>
Should use parenthese to wrap the macro definition, otherwise
we will encounter error like the following:

"
if (base_addr != LCDIF1_BASE_ADDR) {
    puts("Wrong LCD interface!\n");
    return -EINVAL;
}
"

Without this patch, we will always encounter "Wrong LCD interface".

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Reviewed-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6: add clock api for lcdif</title>
<updated>2015-11-12T16:40:53Z</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-10-29T07:54:47Z</published>
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<id>urn:sha1:ad153782e07ee3a95ccef6b6eeddaaaec918421f</id>
<content type='text'>
Implement mxs_set_lcdclk, enable_lcdif_clock and enable_pll_video.
The three API can be used to configure lcdif related clock when
CONFIG_VIDEO_MXS enabled.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
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