u-boot.git/arch/arm/include/asm/arch-mx6, branch v2016.05

MX6UL: Add definition for UART6 base address

2016-04-19T14:36:54Z

Define the UART6_BASE_ADDR for MX6UL. Signed-off-by: Fabio Estevam

imx: mx6: Fix procedure to switch the parent of LDB_DI_CLK

2016-04-19T14:05:12Z

Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. This patch was ported from the 3.10.17 NXP kernel http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d NXP errata number: ERR009219, EB821 Signed-off-by: Akshay Bhat Cc: Stefano Babic Cc: Fabio Estevam

arm: mx6: Add UART8 base address for i.MX6UL

2016-03-26T13:16:12Z

Add the base address for the i.MX6UL so that this UART can be used. Signed-off-by: Stefan Roese Cc: Ye Li Cc: Fabio Estevam Cc: Stefano Babic

imx: mx6: implement functions to boot auxiliary core

2016-02-21T10:46:26Z

Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

imx: mx6sx Add RDC mappings of masters and peripherals

2016-02-21T10:46:26Z

Add the definitions for the RDC mappings for i.MX6 SoloX. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

imx: imx-common: introduce Resource Domain Controller support

2016-02-21T10:46:26Z

Introduce Resource Domain Controller support for i.MX. Now i.MX6SX and i.MX7D supports this feature to assign masters and peripherals to different domains. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

imx: mx6: introduce rdc regs

2016-02-21T10:46:25Z

Introudce rdc regs structure and rdc sema reg structure for i.MX6. For now, to i.MX6, only i.MX6SX supports this. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

mx6: soc: Add ENET2 mac address support

2016-02-02T20:03:59Z

The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li

arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL

2016-02-02T19:58:46Z

Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability. Signed-off-by: Marek Vasut Cc: Stefano Babic

imx: mx6ul/sx: fix mmdc_ch0 clk calculation

2016-01-24T11:13:21Z

Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications Processor Reference Manual and "Figure 18-5. BUS clock generation" of i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk sources from pll4_main_clk(pll_audio), the calculation is wrong. Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support for decode_pll. Signed-off-by: Peng Fan Cc: Stefano Babic