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<title>u-boot.git/arch/arm/include/asm/arch-mx6, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-mx6?h=v2016.07</id>
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<updated>2016-05-24T17:42:03Z</updated>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-05-24T17:42:03Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-24T17:42:03Z</published>
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<id>urn:sha1:fc15b9beed05dec6cc092c265042381a0eadb0e9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>arch/arm: add SEC JR0 offset</title>
<updated>2016-05-18T15:51:46Z</updated>
<author>
<name>Alex Porosanu</name>
<email>alexandru.porosanu@freescale.com</email>
</author>
<published>2016-04-29T12:17:58Z</published>
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<id>urn:sha1:e99d7193593cf6331ea04cd394a9a4cf18886ef0</id>
<content type='text'>
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)

Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5</title>
<updated>2016-05-17T15:52:19Z</updated>
<author>
<name>Eric Nelson</name>
<email>eric@nelint.com</email>
</author>
<published>2016-04-24T17:54:19Z</published>
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<id>urn:sha1:9f623326eb67b3475797940a21bb405649c0729b</id>
<content type='text'>
This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9.

Signed-off-by: Eric Nelson &lt;eric@nelint.com&gt;
Reviewed-by: Peng Fan &lt;van.freenix@gmail.com&gt;
</content>
</entry>
<entry>
<title>MX6UL: Add definition for UART6 base address</title>
<updated>2016-04-19T14:36:54Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2016-04-18T12:56:15Z</published>
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<id>urn:sha1:9999fc0957fc0b962cb71423b79e7145dacd6c45</id>
<content type='text'>
Define the UART6_BASE_ADDR for MX6UL.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6: Fix procedure to switch the parent of LDB_DI_CLK</title>
<updated>2016-04-19T14:05:12Z</updated>
<author>
<name>Akshay Bhat</name>
<email>akshay.bhat@timesys.com</email>
</author>
<published>2016-04-12T22:13:56Z</published>
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<id>urn:sha1:90d7cc42b31251548b3cfb0e65a266020159784d</id>
<content type='text'>
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree,
the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the
ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is
generated, and the LVDS display will hang when the ipu_di_clk is sourced from
ldb_di_clk.

To fix the problem, both the new and current parent of the ldb_di_clk should
be disabled before the switch. This patch ensures that correct steps are
followed when ldb_di_clk parent is switched in the beginning of boot.

This patch was ported from the 3.10.17 NXP kernel
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&amp;id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d

NXP errata number: ERR009219, EB821

Signed-off-by: Akshay Bhat &lt;akshay.bhat@timesys.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: mx6: Add UART8 base address for i.MX6UL</title>
<updated>2016-03-26T13:16:12Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-02-10T10:41:25Z</published>
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<id>urn:sha1:51560f0b04fa147f135d160eb655c8ec9e41462c</id>
<content type='text'>
Add the base address for the i.MX6UL so that this UART can be used.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Ye Li &lt;ye.li@nxp.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>imx: mx6: implement functions to boot auxiliary core</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:05Z</published>
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<id>urn:sha1:0623d375cfa9593260c0e6bfe404b38d3d5c7c7c</id>
<content type='text'>
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.

arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6sx Add RDC mappings of masters and peripherals</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:01Z</published>
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<id>urn:sha1:d08607e1e7b05f86f81e21601f6012d20ae1c397</id>
<content type='text'>
Add the definitions for the RDC mappings for i.MX6 SoloX.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: imx-common: introduce Resource Domain Controller support</title>
<updated>2016-02-21T10:46:26Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:55:00Z</published>
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<id>urn:sha1:de09c43bbfeeae767a8561d2810df55675e8b1a4</id>
<content type='text'>
Introduce Resource Domain Controller support for i.MX.
Now i.MX6SX and i.MX7D supports this feature to assign masters
and peripherals to different domains.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: mx6: introduce rdc regs</title>
<updated>2016-02-21T10:46:25Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2016-01-28T08:54:59Z</published>
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<id>urn:sha1:613e01065a17e17af9b6ab5b41c976a03990cc1a</id>
<content type='text'>
Introudce rdc regs structure and rdc sema reg structure for i.MX6.
For now, to i.MX6, only i.MX6SX supports this.

Signed-off-by: Ye.Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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