u-boot.git/arch/arm/include/asm/arch-mx7, branch v2016.07

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

2016-05-24T17:42:03Z

arch/arm: add SEC JR0 offset

2016-05-18T15:51:46Z

Freescale PPC SoCs do not hard-code security engine's Job Ring 0 address, rather a define is used. This patch adds the same functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts) Signed-off-by: Alex Porosanu Reviewed-by: York Sun

imx: iomux-v3: fix UART input selects

2016-05-17T15:52:20Z

Several UART input selects are missing. The fourth input select for UART2_TX_DATA_ALT0 is actually also missing in the documentation. (at least in Rev. B of the i.MX 7Dual Reference Manual). However, when looking at the tables of other input selects, it is very natural that there must be an input select for the UART2_TX_DATA_ALT0 pad. The Colibri iMX7 also uses that pad for UART2 RX (in DTE mode), and it was required to set that particular input select register to get a working UART2.

imx: mx7: implement functions to boot auxiliary core

2016-02-21T10:46:26Z

Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

imx: mx7d: Add RDC support

2016-02-21T10:46:26Z

Add the peripherals/masters definitions and registers base addresses for mx7d RDC. Signed-off-by: Ye.Li Signed-off-by: Peng Fan

imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7

2016-02-21T10:20:54Z

Refactored data structure for CAAM's job ring and Secure Memory to support i.MX7. The new memory map use macros to resolve SM's offset by version. This will solve the versioning issue caused by the new version of secure memory of i.MX7 Signed-off-by: Ulises Cardenas Reviewed-by: Stefano Babic

imx: mx7: default enable MDIO open drain

2016-01-24T11:15:14Z

The management data input/output (MDIO) requires open-drain, i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports this feature. So to TO1.1, need to enable open drain by setting bits GPR0[8:7] for TO1.1. Signed-off-by: Peng Fan Cc: Stefano Babic

imx: lcdif: use one register structure for i.MXes

2015-11-12T16:38:09Z

Share one lcdif structure for i.MXes. 1. Discard struct mxs_lcdif_regs from imx-regs.h of i.MX7 2. Add i.MX6SX/6UL/7D support in imx-lcdif.h of imx-common Signed-off-by: Peng Fan Cc: Stefano Babic

mx7: psci: add basic psci support

2015-11-12T16:31:16Z

1. add basic psci support for imx7 chip. 2. support cpu_on and cpu_off. 3. switch to non-secure mode when boot linux kernel. 4. set csu allow accessing all peripherial register in non-secure mode. Signed-off-by: Frank Li Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam

imx: mx7dsabresd: Add support for MX7D SABRESD board

2015-09-13T08:11:54Z

* Add i.MX7D SABRESD target board support with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan Signed-off-by: Fugang Duan Signed-off-by: Ye.Li Signed-off-by: Adrian Alonso