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<title>u-boot.git/arch/arm/include/asm/arch-tegra2/clock.h, branch v2012.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-tegra2/clock.h?h=v2012.07</id>
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<updated>2012-07-07T12:07:19Z</updated>
<entry>
<title>tegra: Correct PLL access in ap20.c and clock.c</title>
<updated>2012-07-07T12:07:19Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-04-19T08:04:39Z</published>
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<id>urn:sha1:27c4a3318f716cce0a23248317534bda7792230b</id>
<content type='text'>
Correct this warning seen by Albert:

ap20.c:44:18: warning: array subscript is above array bounds

There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Add functions to access low-level Osc/PLL details</title>
<updated>2012-05-15T06:31:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-04-02T13:18:47Z</published>
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<id>urn:sha1:ffc76482c2d86ca29168527e57fb75c0ea08ec6d</id>
<content type='text'>
Add clock_ll_read_pll() to read PLL parameters and clock_get_osc_bypass()
to find out if the Oscillator is bypassed. These are needed by warmboot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: fdt: Add function to return peripheral/clock ID</title>
<updated>2012-03-29T06:12:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-03-06T17:10:27Z</published>
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<id>urn:sha1:ed2974493e838399eacd4bf88f38b215955688a8</id>
<content type='text'>
A common requirement is to find the clock ID for a peripheral. This is the
second cell of the 'clocks' property (the first being the phandle itself).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: add clock_ll_start_uart() to enable UART prior to reloc</title>
<updated>2011-12-24T09:23:32Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2011-11-28T15:04:37Z</published>
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<id>urn:sha1:8442fd3c6a82def9beac46ab683f2fd4bf8f8f14</id>
<content type='text'>
Most boards will want to enable a UART early. This function provides
that feature in Tegra architecture code so the code does not need to be
copied on every board.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra2: Add more clock functions</title>
<updated>2011-10-27T19:56:29Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2011-09-21T12:40:04Z</published>
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<id>urn:sha1:4ed59e70e4e0309794d532120d8c357b308b0e23</id>
<content type='text'>
This adds most of the clock functions required by board and driver code:

-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control

These functions are plumbed in as required.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra2: Rename CLOCK_PLL_ID to CLOCK_ID</title>
<updated>2011-10-27T19:56:29Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2011-09-21T12:40:02Z</published>
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<id>urn:sha1:03c609f69b12dca47b9422595fdde29be1fb35c9</id>
<content type='text'>
Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.

This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra2: Add more clock support</title>
<updated>2011-09-04T09:36:15Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2011-08-30T06:23:13Z</published>
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<id>urn:sha1:b4ba2be8dc2711ad2219186e89b4e10648d52af9</id>
<content type='text'>
This adds functions to enable/disable clocks and reset to on-chip peripherals.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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