<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/include/asm/arch-tegra, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-tegra?h=v2016.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-tegra?h=v2016.01'/>
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<updated>2015-11-12T16:21:07Z</updated>
<entry>
<title>ARM: tegra: rename GPU functions</title>
<updated>2015-11-12T16:21:07Z</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2015-10-19T04:57:03Z</published>
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<id>urn:sha1:eca676bd673f7737d1e85391d846f014d9c197da</id>
<content type='text'>
Rename GPU functions to less generic names to avoid potential name
collisions.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: remove vpr_configured() function</title>
<updated>2015-11-12T16:21:07Z</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2015-10-19T04:57:01Z</published>
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<id>urn:sha1:36e5f7ce1c64b4fa0a12c82f84086f5be560b706</id>
<content type='text'>
There is no justification for this function, especially in exported
form.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Implement clk_m</title>
<updated>2015-09-16T23:10:22Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-08-20T09:42:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c043c0259cd88f39cdca5f98af8b10f178660745'/>
<id>urn:sha1:c043c0259cd88f39cdca5f98af8b10f178660745</id>
<content type='text'>
On currently supported SoCs, clk_m always runs at the same frequency as
the oscillator input. However newer SoC generations such as Tegra210 no
longer have that restriction. Prepare for that by separating clk_m from
the oscillator clock and allow SoC code to override the clk_m rate.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Remove tegra_spl_gpio_direction_output declaration from header file</title>
<updated>2015-09-16T23:10:22Z</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@ingics.com</email>
</author>
<published>2015-03-11T07:16:29Z</published>
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<id>urn:sha1:a6b2daffdedf0664f7b49eb20c81f1adada6bd51</id>
<content type='text'>
This function is deleted by commit 2fccd2d96bad
"tegra: Convert tegra GPIO driver to use driver model".

Signed-off-by: Axel Lin &lt;axel.lin@ingics.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>bitops: introduce BIT() definition</title>
<updated>2015-09-11T21:15:32Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2015-09-07T11:43:52Z</published>
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<id>urn:sha1:92a3188d7d836779915e3a6f9251fa07b9c753e4</id>
<content type='text'>
introduce BIT() definition, used in at91_udc gadget
driver.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
[remove all other occurrences of BIT(x) definition]
Signed-off-by: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
Acked-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Make pinmux.h standalone includible</title>
<updated>2015-08-13T20:06:03Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-03-20T12:24:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=35f590f4c3300f1aa6bcd2c69ff2f96839cdd85c'/>
<id>urn:sha1:35f590f4c3300f1aa6bcd2c69ff2f96839cdd85c</id>
<content type='text'>
This header file uses type definitions (u8, u32) from linux/types.h but
doesn't include it. If includes aren't carefully ordered this can cause
build failures.

Cc: Tom Warren &lt;twarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: allow reading recovery mode boot type</title>
<updated>2015-08-13T20:06:01Z</updated>
<author>
<name>Marcel Ziswiler</name>
<email>marcel.ziswiler@toradex.com</email>
</author>
<published>2015-08-05T22:46:59Z</published>
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<id>urn:sha1:a1f34ed87356ffa0095ca1962098abfcc58fe374</id>
<content type='text'>
Add defines to allow reading recovery mode (RCM) boot type from the boot
information table (BIT) written by the boot ROM (BR) to the IRAM.

Signed-off-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: enable GPU DT node when appropriate</title>
<updated>2015-08-06T17:50:03Z</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2015-07-09T07:33:01Z</published>
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<id>urn:sha1:a38a3c4af4ed72a2ed6192203f8fe17ccdd2389f</id>
<content type='text'>
T124/210 requires some specific configuration (VPR setup) to
be performed by the bootloader before the GPU can be used.
For this reason, the GPU node in the device tree is disabled
by default. This patch enables the node if U-boot has performed
VPR configuration.

Boards enabled by this patch are T124's Jetson TK1 and Venice2
and T210's P2571.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Cc: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Tom Warren &lt;twarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: move VPR configuration to a later stage</title>
<updated>2015-08-06T17:50:03Z</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2015-07-09T07:33:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=871d78ed1b906a79d8a6dad96a9f83dea7b9170f'/>
<id>urn:sha1:871d78ed1b906a79d8a6dad96a9f83dea7b9170f</id>
<content type='text'>
U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().

Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Cc: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Tom Warren &lt;twarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.</title>
<updated>2015-08-05T22:22:51Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2015-06-25T16:50:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=722e000ccd7226c5cd071590b5361620eb0b126c'/>
<id>urn:sha1:722e000ccd7226c5cd071590b5361620eb0b126c</id>
<content type='text'>
Added PLL variables (dividers mask/shift, lock enable/detect, etc.)
to new pllinfo struct for each Soc/PLL. PLLA/C/D/E/M/P/U/X.

Used pllinfo struct in all clock functions, validated on T210.
Should be equivalent to prior code on T124/114/30/20. Thanks
to Marcel Ziswiler for corrections to the T20/T30 values.

Signed-off-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Tested-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
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