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<title>u-boot.git/arch/arm/include/asm/arch-tegra, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-tegra?h=v2016.09</id>
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<updated>2016-08-15T17:26:13Z</updated>
<entry>
<title>mmc: tegra: port to standard clock/reset APIs</title>
<updated>2016-08-15T17:26:13Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-05T22:10:33Z</published>
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<id>urn:sha1:c04930762d433aeef94d8c910fa65461d43b9016</id>
<content type='text'>
Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
still use custom APIs. Enhance the Tegra MMC driver so that it can operate
with either set of APIs.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>misc: add Tegra BPMP driver</title>
<updated>2016-08-15T17:26:12Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T15:41:34Z</published>
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<id>urn:sha1:73dd5c4cfeaff67347d8bafb25c197fc97c6a9dc</id>
<content type='text'>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add IVC protocol implementation</title>
<updated>2016-07-21T16:31:30Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-07-18T18:17:11Z</published>
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<id>urn:sha1:49626ea801e8bb33c9ee4cbcb69e2fea6b13c330</id>
<content type='text'>
IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter
Processor Communication) framework. Within the context of U-Boot, it is
typically used for communication between the main CPU and various
auxiliary processors. In particular, it will be used to communicate with
the BPMP (Boot and Power Management Processor) on Tegra186 in order to
manipulate clocks and reset signals.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Various, unrelated tree-wide typo fixes.</title>
<updated>2016-07-16T13:43:12Z</updated>
<author>
<name>Robert P. J. Day</name>
<email>rpjday@crashcourse.ca</email>
</author>
<published>2016-07-15T17:44:45Z</published>
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<id>urn:sha1:62a3b7dd086ef8ceba91e99cceb19704efc1b482</id>
<content type='text'>
    Fix a number of typos, including:

     * "compatble" -&gt; "compatible"
     * "eanbeld" -&gt; "enabled"
     * "envrionment" -&gt; "environment"
     * "FTD" -&gt; "FDT" (for "flattened device tree")
     * "ommitted" -&gt; "omitted"
     * "overriden" -&gt; "overridden"
     * "partiton" -&gt; "partition"
     * "propogate" -&gt; "propagate"
     * "resourse" -&gt; "resource"
     * "rest in piece" -&gt; "rest in peace"
     * "suport" -&gt; "support"
     * "varible" -&gt; "variable"

Signed-off-by: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
</content>
</entry>
<entry>
<title>mmc: tegra: add basic Tegra186 support</title>
<updated>2016-05-31T18:22:59Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-12T18:11:23Z</published>
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<id>urn:sha1:39f633320c569a5d975d2d051ff2683db27bd021</id>
<content type='text'>
Tegra186's MMC controller needs to be explicitly identified. Add another
compatible value for it.

Tegra186 will use an entirely different clock/reset control mechanism to
existing chips, and will use standard clock/reset APIs rather than the
existing Tegra-specific custom APIs. The driver support for that isn't
ready yet, so simply disable all clock/reset usage if compiling for
Tegra186. This must happen at compile time rather than run-time since the
custom APIs won't even be compiled in on Tegra186. In the long term, the
plan would be to convert the existing custom APIs to standard APIs and get
rid of the ifdefs completely.

The system's main eMMC will work without any clock/reset support, since
the firmware will have already initialized the controller in order to
load U-Boot. Hence the driver is useful even in this apparently crippled
state.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: use DT bindings for GPIO naming</title>
<updated>2016-05-31T16:53:56Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-12T18:07:39Z</published>
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<id>urn:sha1:01a97a11db75c1a006da7b40d8ba4a325f05960c</id>
<content type='text'>
There are currently many places that define the list of all Tegra GPIOs;
the DT binding header and custom Tegra-specific header file gpio.h. Fix
the redundancy by replacing everything with the DT binding header file.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: enable GPU node by compatible value</title>
<updated>2016-05-04T20:31:03Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-04-12T17:17:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9b6f58efd21adf892c2507a46a0d04dd1441650'/>
<id>urn:sha1:d9b6f58efd21adf892c2507a46a0d04dd1441650</id>
<content type='text'>
In current Linux kernel Tegra DT files, 64-bit addresses are represented
in unit addresses as a pair of comma-separated 32-bit values. Apparently
this is no longer the correct representation for simple busses, and the
unit address should be represented as a single 64-bit value. If this is
changed in the DTs, arm/arm/mach-tegra/board2.c:ft_system_setup() will no
longer be able to find and enable the GPU node, since it looks up the node
by name.

Fix that function to enable nodes based on their compatible value rather
than their node name. This will work no matter what the node name is, i.e
for DTs both before and after any rename operation.

Cc: Thierry Reding &lt;treding@nvidia.com&gt;
Cc: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: video: Clean up the old LCD/PWM driver code</title>
<updated>2016-02-16T16:17:53Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-30T23:38:02Z</published>
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<id>urn:sha1:e007633b002cdd57f194684a77decd0d56a1f664</id>
<content type='text'>
Remove the old PWM code. Remove calls to CONFIG_LCD functions now that we
are using driver model for video.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: lcd: Merge tegra124-lcd.c into display.c</title>
<updated>2016-02-16T16:17:51Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-30T23:37:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4dd811581ab8d85a9ac01ef49d5afbb697660976'/>
<id>urn:sha1:4dd811581ab8d85a9ac01ef49d5afbb697660976</id>
<content type='text'>
There isn't a lot of benefit of have two separate files. With driver model
the code needs to be in the same driver, so it's better to have it in the
same file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: pwm: Add a driver for the tegra PWM</title>
<updated>2016-02-16T16:17:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-30T23:37:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7429b9623b9d636d6fc686db3af29cc79d901bc6'/>
<id>urn:sha1:7429b9623b9d636d6fc686db3af29cc79d901bc6</id>
<content type='text'>
This PWM supports four channels. The driver always uses the 32KHz clock,
and adjusts the duty cycle accordingly.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
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