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<title>u-boot.git/arch/arm/include/asm/arch-tegra, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-tegra?h=v2018.09</id>
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<updated>2018-05-07T13:34:12Z</updated>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>dm: tegra: Convert clock_decode_periph_id() to support livetree</title>
<updated>2017-07-28T18:02:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-07-25T14:30:00Z</published>
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<id>urn:sha1:000f15fa15c57d2d2f5a1a1d2ea233edbff6461e</id>
<content type='text'>
Adjust this to take a device as a parameter instead of a node.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dm: tegra: Convert USB setup to livetree</title>
<updated>2017-07-28T18:02:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-07-25T14:29:59Z</published>
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<id>urn:sha1:be7890927a0f9fd40e697ed857cba8c2de1d178e</id>
<content type='text'>
Adjust this code to support a live device tree. This should be implemented
as a PHY driver but that is left as an exercise for the maintainer.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: tegra124: Add a PMC syscon driver</title>
<updated>2017-07-28T18:02:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-07-25T14:29:58Z</published>
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<id>urn:sha1:66de3eee7923d3eb4101ff2565afa48f4376a939</id>
<content type='text'>
The PMC can be modelled as a syscon peripheral. Add a driver for this
so that it can be accessed by drivers when needed. Enable it for tegra124
boards.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Init clocks even when SPL did not run</title>
<updated>2017-06-09T19:39:32Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-31T23:57:16Z</published>
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<id>urn:sha1:46864cc8e82ade3523f4c474b7451bb960e4ad70</id>
<content type='text'>
At present early clock init happens in SPL. If SPL did not run (because
for example U-Boot is chain-loaded from another boot loader) then the
clocks are not set as U-Boot expects.

Add a function to detect this and call the early clock init in U-Boot
proper.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>mmc: tegra: allow disabling external clock loopback</title>
<updated>2017-04-01T22:45:04Z</updated>
<author>
<name>Marcel Ziswiler</name>
<email>marcel.ziswiler@toradex.com</email>
</author>
<published>2017-03-25T00:18:22Z</published>
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<id>urn:sha1:4119b7098c8ef83105946502bc7098dec67bd15d</id>
<content type='text'>
Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock
loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0
register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM.

Signed-off-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add APIs the clock uclass driver will need</title>
<updated>2016-09-27T16:11:02Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-09-13T16:45:56Z</published>
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<id>urn:sha1:d0ad8a5cbfe8d52339ac5bea3617af21d2fd079a</id>
<content type='text'>
A future patch will implement a clock uclass driver for Tegra. That driver
will call into Tegra's existing clock code to simplify the transition;
this avoids tieing the clock uclass patches into significant refactoring
of the existing custom clock API implementation.

Some of the Tegra clock APIs that manipulate peripheral clocks require
both the peripheral clock ID and parent clock ID to be passed in together.
However, the clock uclass API does not require any such "parent"
parameter, so the clock driver must determine this information itself.
This patch implements new Tegra- specific clock API
clock_get_periph_parent() for this purpose.

The new API is implemented in the core Tegra clock code rather than SoC-
specific clock code. The implementation uses various SoC-/clock-specific
data. That data is only available in SoC-specific clock code.
Consequently, two new internal APIs are added that enable the core clock
code to retrieve this information from the SoC-specific clock code. Due to
the structure of the Tegra clock code, this leads to some unfortunate code
duplication. However, this situation predates this patch.

Ideally, future work will de-duplicate the Tegra clock code, and migrate
it into drivers/clk/tegra. However, such refactoring is kept separate from
this series.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add peripheral clock init table</title>
<updated>2016-09-27T16:11:02Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-09-13T16:45:55Z</published>
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<id>urn:sha1:6dbcc962e48e4f2395806469ba59f19fb18aa64a</id>
<content type='text'>
Currently, Tegra peripheral drivers control two aspects of their HW module
clock(s):

1) The clock enable/rate for the peripheral clock itself.

2) The system-level clock tree setup, i.e. the clock parent.

Aspect 1 is reasonable, but aspect 2 is a system-level decision, not
something that an individual peripheral driver should in general know
about or influence. Such system-level knowledge ties the driver to a
specific SoC implementation, even when they use generic APIs for clock
manipulation, since they must have SoC-specific knowledge such as parent
clock IDs. Limited exceptions exist, such as where peripheral HW is
expected to dynamically switch between clock sources at run-time, such
as CPU clock scaling or display clock conflict management in a multi-head
scenario.

This patch enhances the Tegra core code to perform system-level clock
tree setup, in a similar fashion to the Linux kernel Tegra clock driver.
This will allow future patches to simplify peripheral drivers by removing
the clock parent setup logic.

This change is required prior to converting peripheral drivers to use the
standard clock APIs, since:

1) The clock uclass doesn't currently support a set_parent() operation.
Adding one is possible, but not necessary at the moment.

2) The clock APIs retrieve all clock IDs from device tree, and the DT
bindings for almost all peripherals only includes information about the
relevant peripheral clocks, and not any potential parent clocks.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>mmc: tegra: Add DM_MMC support to Tegra MMC driver</title>
<updated>2016-09-27T16:11:01Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2016-09-13T16:45:48Z</published>
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<id>urn:sha1:6a474db4894d37f2edf4ed12e23b9e46f7a8aa3d</id>
<content type='text'>
Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed
to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds.

Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
(swarren, fixed some NULL pointer dereferences, removed extraneous
changes, rebased on various other changes, removed non-DM support etc.)
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>mmc: tegra: priv struct and naming cleanup</title>
<updated>2016-09-27T16:11:01Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-09-13T16:45:46Z</published>
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<id>urn:sha1:f53c4e4bbdb8e78a53141a3aec7bc80e7717a475</id>
<content type='text'>
struct mmc_host is a Tegra-specific structure, but the name implies it's
something defined by core MMC code, which is confusing. Rename it to
struct tegra_mmc_priv to make its purpose more obvious. The new name is
also more appropriate for a DM driver private data structure, which will
be relevant later in this series.

Nothing needs access to this type except the MMC driver itself. Move the
definition into the driver C file.

Make sure all Tegra MMC functions are named tegra_mmc_*. Even though
they're all static, it's useful to have good naming so that symbol tables
are easy to interpret. A few functions aren't renamed by this patch since
they'll be deleted by a subsequent patch in this series.

Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
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