<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/include/asm/arch-uniphier, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-uniphier?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/arch-uniphier?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2015-02-28T15:02:12Z</updated>
<entry>
<title>ARM: UniPhier: move SoC headers to mach-uniphier/include/mach</title>
<updated>2015-02-28T15:02:12Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-02-26T17:26:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9eb7acef97d1a892d59c5928001dd9516bb592de'/>
<id>urn:sha1:9eb7acef97d1a892d59c5928001dd9516bb592de</id>
<content type='text'>
Move arch/arm/include/asm/arch-uniphier/*
  -&gt; arch/arm/mach-uniphier/include/mach/*

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: refactor pinmon command</title>
<updated>2015-02-06T15:15:03Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-02-05T11:56:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4431684910217022bad85a0bc931ad9bfb78859f'/>
<id>urn:sha1:4431684910217022bad85a0bc931ad9bfb78859f</id>
<content type='text'>
The return value of get_boot_mode_sel() is used as the index of
the boot_device_table[] array.  Its type should be "int" rather
than "u32".

Use only the iterator "i" for the loop in do_pinmon().

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: remove dummy gpio.h</title>
<updated>2015-02-06T15:10:34Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-02-03T04:51:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5848899a1f868fe6ae50027d422f0af5f4e2e95d'/>
<id>urn:sha1:5848899a1f868fe6ae50027d422f0af5f4e2e95d</id>
<content type='text'>
This dummy header was introduced by commit 630bf80ebb34 (ARM:
UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL).

Thanks to commit a08d643dbd85 (dm: Drop gpio.h header from
fdtdec.c), such an ugly workaround is no longer needed.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: add SG_MEMCONF macros for DDR channel 2</title>
<updated>2015-01-22T15:52:16Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-21T06:27:48Z</published>
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<id>urn:sha1:0ba924a4ecfe056ab637bfa207fc26cd0248e9ac</id>
<content type='text'>
PH1-sLD3, PH1-LD6b have DDR channel 2.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: rename SG_MEMCONF_* macros for readability</title>
<updated>2015-01-22T15:52:14Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-21T06:27:47Z</published>
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<id>urn:sha1:367a0d51dbb18983f047ca43b9233a121e39b024</id>
<content type='text'>
Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined
by &lt;linux/sizes.h&gt; for readability.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: use &lt;linux/sizes.h&gt; for readability</title>
<updated>2015-01-22T15:52:06Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-21T06:27:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a35d6071809178062afcd6872ce4502217d9f4a'/>
<id>urn:sha1:4a35d6071809178062afcd6872ce4502217d9f4a</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: remove __packed that causes a problem on GCC 4.9</title>
<updated>2015-01-22T15:44:17Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-07T10:41:38Z</published>
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<id>urn:sha1:d6bc30af524463b8020329b80150e773bbc77d27</id>
<content type='text'>
The DDR PHY training function, ddrphy_prepare_training() would not
work if compiled with GCC 4.9.

The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h)
is specified with __packed because it represents a hardware register
mapping, but it turned out to cause a problem on GCC 4.9.

If -mno-unaligned-access is specified (yes, it is in
arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the
__attribute__((packed)) and generates extra instructions to perform
the memory access in a way that does not cause unaligned access.
(Actually it is not need here because the register base, the first
argument of the ddrphy_prepare_training(), is always given with a
4-byte aligned address.)

Anyway, as a result, readl() / writel() is divided into byte-wise
accesses.  The problem is that this hardware only accepts 4-byte
register access.  Byte-wise accesses lead to unexpected behavior.

There are some options to avoid this problem.

[1] Remove -mno-unaligned-access
[2] Add __aligned(4) along with __packed to struct ddrphy
[3] Remove __packed from struct ddrphy

[1] solves the problem for ARMv7, but it does not for pre-ARMv6 and
ARMv6-M architectures where -mno-unaligned-access is default.
So, [1] does not seem reasonable in terms of code portability.

Both [2] and [3] work well, but [2] seems too much.  All the members
of struct ddrphy have the u32 type.  No padding would be inserted
even if __packed is dropped.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: add UART initialization routine for low-level debug</title>
<updated>2015-01-08T14:01:56Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-06T05:28:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b4ad44baab713af371b1113dd63dd222ba73ba13'/>
<id>urn:sha1:b4ad44baab713af371b1113dd63dd222ba73ba13</id>
<content type='text'>
The low-level debugging functions are useful to debug the early boot
stage where the full UART driver is not available.

UniPhier SoCs need to initialize the UART port 0 to use this feature.
The initialization routine is called at the very entry of the
lowlevel_init().

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: enable output of system bus</title>
<updated>2015-01-08T14:01:45Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-06T05:20:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2661dfd0046285e9007c1de126255bee11c0b8cd'/>
<id>urn:sha1:2661dfd0046285e9007c1de126255bee11c0b8cd</id>
<content type='text'>
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: add DDR PHY training code</title>
<updated>2014-12-30T08:45:25Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-12-19T11:20:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b614e16cc07113dc890ecc83649b89da1bced464'/>
<id>urn:sha1:b614e16cc07113dc890ecc83649b89da1bced464</id>
<content type='text'>
This training code provides run-time adjustment of DDR PHY parameters
for stable DDR operation.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
</feed>
