u-boot.git/arch/arm/include/asm/global_data.h, branch v2017.09

arm: change tbu/l type to unsigned int

2017-05-12T12:37:34+00:00

Change tbu/l type to unsigned int.
>From the timer file for arm,
"(((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;" is used,
This piece code is based on tbu/tbl is 32bits, so change the type to
unsigned int.

Signed-off-by: Peng Fan 
Cc: Simon Glass 
Cc: Tom Rini

ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig

2017-04-27T20:49:08+00:00

In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.

Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Tom Rini

armv8: Add global variable resv_ram

2017-03-14T15:44:03+00:00

Use gd->arch.resv_ram to track reserved memory allocation.

Signed-off-by: York Sun 
Reviewed-by: Simon Glass

TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2

2016-11-21T19:07:29+00:00

With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini

armv8: Add tlb_allocated to arch global data

2016-07-15T16:01:43+00:00

When secure ram is used, MMU tables have to be put into secure ram.
To use common MMU code, gd->arch.tlb_addr will be used to host TLB
entry pointer. To save allocated memory for later use, tlb_allocated
variable is added to global data structure.

Signed-off-by: York Sun

armv8: Move secure_ram variable out of generic global data

2016-07-15T16:01:43+00:00

Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.

Signed-off-by: York Sun

arm64: Remove non-full-va map code

2016-03-15T19:13:10+00:00

By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.

To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.

Signed-off-by: Alexander Graf

arm64: Make full va map code more dynamic

2016-03-15T19:13:01+00:00

The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.

So this patch moves the full_va mapping code to 4k page size and
makes it fully flexible to dynamically create as many levels as
necessary for a map (including dynamic 1G/2M pages). It also adds
support to dynamically split a large map into smaller ones when
some code wants to set dcache attributes.

With all this in place, there is very little reason to create your
own page tables in board specific files.

Signed-off-by: Alexander Graf

armv8: New MMU setup code allowing to use 48+ bits PA/VA

2016-01-19T22:25:36+00:00

This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule are able to use direct PA-VA mapping of the whole 48 bit
address space.
It also adds the ability to reset the SCTRL register at the very beginning
of execution to avoid interference from stale mappings set up by early
firmware/loaders/etc.

Signed-off-by: Sergey Temerkhanov 
Signed-off-by: Radha Mohan Chintakuntla

armv8: LS2080A: Rename LS2085A to reflect LS2080A

2015-11-30T16:53:04+00:00

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)

Signed-off-by: Pratiyush Mohan Srivastava 
Signed-off-by: Prabhakar Kushwaha 
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: York Sun