<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/include/asm/global_data.h, branch v2024.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/global_data.h?h=v2024.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/global_data.h?h=v2024.01'/>
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<updated>2023-11-17T16:58:26Z</updated>
<entry>
<title>Revert "arm64: Use FEAT_HAFDBS to track dirty pages when available"</title>
<updated>2023-11-17T16:58:26Z</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2023-10-27T00:23:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0585c28fda1007e4a90dea5f70723cff0b63dd98'/>
<id>urn:sha1:0585c28fda1007e4a90dea5f70723cff0b63dd98</id>
<content type='text'>
This reverts commit 6cdf6b7a340db4ddd008516181de7e08e3f8c213. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
</content>
</entry>
<entry>
<title>Revert "arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present"</title>
<updated>2023-11-17T16:58:26Z</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2023-10-27T00:23:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eed8294b75a5908a486945ff6655d4dc9aae5fed'/>
<id>urn:sha1:eed8294b75a5908a486945ff6655d4dc9aae5fed</id>
<content type='text'>
This reverts commit 836b8d4b205d2175b57cb9ef271e638b0c116e89. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
</content>
</entry>
<entry>
<title>Record the position of the SMBIOS tables</title>
<updated>2023-09-21T22:05:40Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-20T03:00:15Z</published>
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<id>urn:sha1:50834884a8159845475fdc28ac196a41fe4d4915</id>
<content type='text'>
Remember where these end up so that we can pass this information on to
the EFI layer.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>imx: use generic name ele(EdgeLockSecure Enclave)</title>
<updated>2023-07-13T09:29:40Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-06-15T10:09:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d3ee9dbd5984321d4a2932e19a59f455d8d90817'/>
<id>urn:sha1:d3ee9dbd5984321d4a2932e19a59f455d8d90817</id>
<content type='text'>
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present</title>
<updated>2023-04-25T19:31:27Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2023-03-17T16:22:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=836b8d4b205d2175b57cb9ef271e638b0c116e89'/>
<id>urn:sha1:836b8d4b205d2175b57cb9ef271e638b0c116e89</id>
<content type='text'>
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Link: https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8
</content>
</entry>
<entry>
<title>arm64: Use FEAT_HAFDBS to track dirty pages when available</title>
<updated>2023-04-25T19:31:27Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2023-03-17T16:22:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6cdf6b7a340db4ddd008516181de7e08e3f8c213'/>
<id>urn:sha1:6cdf6b7a340db4ddd008516181de7e08e3f8c213</id>
<content type='text'>
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Link: https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263
</content>
</entry>
<entry>
<title>imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion</title>
<updated>2023-03-29T18:15:42Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2023-01-31T08:42:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b956bdddd308137b848e5ca87da0115abdb86d7'/>
<id>urn:sha1:8b956bdddd308137b848e5ca87da0115abdb86d7</id>
<content type='text'>
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment.
M33 will be the TRDC owner and needs to configure TRDC. A35 is the
XRDC owner, ATF will configure XRDC.

The handshake between U-boot and M33 image is used to sync TRDC and
XRDC configuration completion. Once the handshake is done, A35 and M33
can access the allowed resources in others domain.

The handshake is needed when M33 is booted or DBD_EN fused, because both
cases will enable the TRDC. If handshake is timeout, the boot will hang.
We use SIM GPR0 to pass the info from SPL to u-boot, because before the
handshake, u-boot can't access SEC SIM and FSB.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Jacky Bai &lt;ping.bai@nxp.com&gt;
</content>
</entry>
<entry>
<title>global: Move remaining CONFIG_SYS_* to CFG_SYS_*</title>
<updated>2022-12-05T21:06:08Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-11-16T18:10:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8'/>
<id>urn:sha1:65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8</id>
<content type='text'>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Makefile: Allow LTO to be disabled for a build</title>
<updated>2022-09-02T20:20:11Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-08-03T18:13:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a55014d09b29d7bc2cbaeb8e41a155c9a257a183'/>
<id>urn:sha1:a55014d09b29d7bc2cbaeb8e41a155c9a257a183</id>
<content type='text'>
LTO (Link-Time Optimisation) is an very useful feature which can
significantly reduce the size of U-Boot binaries. So far it has been
made available for selected ARM boards and sandbox.

However, incremental builds are much slower when LTO is used. For example,
an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7
seconds with LTO enabled.

Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be
disabled during development if needed, for faster builds.

Add some documentation about LTO while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>imx: imx9: Get the chip revision through S400 API</title>
<updated>2022-07-26T09:29:01Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-07-26T08:40:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=989f73934d202138376a7a768073851e426c472a'/>
<id>urn:sha1:989f73934d202138376a7a768073851e426c472a</id>
<content type='text'>
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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