<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/include/asm/mach-imx, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/mach-imx?h=master</id>
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<updated>2026-03-16T21:44:58Z</updated>
<entry>
<title>misc: ele_api: Add support for XSPI SET GMID command</title>
<updated>2026-03-16T21:44:58Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-03-12T00:57:23Z</published>
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<id>urn:sha1:1c6e3a75502062ceb33f06cb4db5e7c5927deac5</id>
<content type='text'>
The XSPI SET GMID command is used to assign GMID ownership to the
requester, allowing access to protected XSPI control registers. This API
must be called in SPL if XSPI GMID-protected settings need to be
modified. Otherwise, XSPI configuration depends on the previous GMID
owner to provide the correct settings.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: imx: Add i.MX952 CPU type support</title>
<updated>2026-03-16T21:44:00Z</updated>
<author>
<name>Alice Guo</name>
<email>alice.guo@nxp.com</email>
</author>
<published>2026-03-02T05:20:05Z</published>
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<id>urn:sha1:14adc4000178ec9069b4b35d87007a0af6e16ca1</id>
<content type='text'>
Add CPU type definition and detection macro for i.MX952 SoC.

Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx9: scmi: Get DDR size through SM SCMI API</title>
<updated>2026-03-16T21:44:00Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-03-02T05:20:02Z</published>
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<id>urn:sha1:e1cc7117b6302464977fffca3e2c05bf8f3f6c77</id>
<content type='text'>
System Manager(SM) has implemented the MISC protocol to retrieve DDR
information. Using this API, U-Boot can obtain the DDR size dynamically
instead of relying on static configuration macros.

This change addresses the DDR ECC enabled case, where 1/8 of the total
DDR size is reserved for ECC data. The scmi_misc_ddrinfo() returns the
DDR size with EEC overhead already deducted.

Implementation details:
- Query the DDR size via scmi_misc_ddrinfo()
- Replace direct REG_DDR_CS[0,1]_BNDS register reads with SCMI call
- Switch from PHYS_SDRAM[x]_SIZE macros to runtime detection
- For backward compatibility with older SM firmware, fall back to
  static PHYS_SDRAM[x]_SIZE configuration if the SCMI call fails

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>misc: ele_api: Add Voltage change start and finish APIs</title>
<updated>2026-01-17T18:00:23Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-01-08T11:06:56Z</published>
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<id>urn:sha1:e77d6948f5c2b5fee49b64dbd76bd334219ff963</id>
<content type='text'>
On GDET enabled part, need to call voltage change start and finish
APIs when adjust the voltage more than 100mv. Otherwise GDET will be
triggered and system is reset

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx9: Add i.MX94 CPU type and SoC-level Kconfig</title>
<updated>2025-09-26T12:51:21Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2025-09-23T02:14:53Z</published>
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<id>urn:sha1:a87b9283266344ac31ef76a3a3ccf2da65429818</id>
<content type='text'>
Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.

The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Jacky Bai &lt;ping.bai@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: imx: Update ELE get_info structure for i.MX94</title>
<updated>2025-07-17T12:56:33Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2025-07-07T20:42:53Z</published>
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<id>urn:sha1:cadc0abe65ff30d8d5442ec960ca1797920649c4</id>
<content type='text'>
Since i.MX94, the ELE get_info structure is updated to add
OEM PQC SRK hash, so update it.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Jacky Bai &lt;ping.bai@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx9: scmi: add i.MX95 SoC and clock related code</title>
<updated>2025-05-03T19:55:32Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2025-04-28T10:37:34Z</published>
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<id>urn:sha1:0bd99a1dd2d3b647c82b6b04891f389b3e7799e5</id>
<content type='text'>
This patch adds i.MX95 SoC and clock related code. Because they are
based on SCMI, put them in the scmi subfolder.

Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Ji Luo &lt;ji.luo@nxp.com&gt;
Signed-off-by: Jindong Yue &lt;jindong.yue@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ranjani Vaidyanathan &lt;ranjani.vaidyanathan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: Add iMX91 support</title>
<updated>2024-12-07T12:07:04Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-12-03T15:42:48Z</published>
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<id>urn:sha1:a9d562daa3c35ee992f3f394581e80e145da4933</id>
<content type='text'>
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.

i.MX9131:
  - Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
  - A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
  - Support 800Mhz ARM clock
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
  - No parallel display, eQOS, flexcan

Updated Clock/Container/CPU and etc for i.MX91

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: hab: Make imx_hab_is_enabled dependent on FIELD_RETURN</title>
<updated>2024-11-09T11:53:36Z</updated>
<author>
<name>Paul Geurts</name>
<email>paul.geurts@prodrive-technologies.com</email>
</author>
<published>2024-11-01T08:49:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0bf7d6b4979835616f396337870d065543a2db4e'/>
<id>urn:sha1:0bf7d6b4979835616f396337870d065543a2db4e</id>
<content type='text'>
The decision on whether HAB is enabled is solely based on the SEC_CONFIG
fuse. The HAB FIELD_RETURN feature is able to permanently disable HAB on
a CPU, after which it is able to boot unsigned firmware. U-Boot however
does not take into account the FIELD_RETURN mode, and refuses to boot
unsigned software when the feature is enabled.

Also take the FIELD_RETURN fuse into account when deciding whether HAB
is enabled. When The FIELD_RETURN fuse is blown, HAB is not enabled.

Tested on i.MX8M Mini, i.MX8M Plus, i.MX8M Nano and i.MX6ULL

Signed-off-by: Paul Geurts &lt;paul.geurts@prodrive-technologies.com&gt;
</content>
</entry>
<entry>
<title>imx: hab: rename imx_sec_config_fuse_t to imx_fuse</title>
<updated>2024-11-09T11:53:36Z</updated>
<author>
<name>Paul Geurts</name>
<email>paul.geurts@prodrive-technologies.com</email>
</author>
<published>2024-11-01T08:49:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0a245862c2ba7a4a63dc6f6c1afbdcdb50c4ed89'/>
<id>urn:sha1:0a245862c2ba7a4a63dc6f6c1afbdcdb50c4ed89</id>
<content type='text'>
The imx_sec_config_fuse_t structure is not specific to the sec_config
fuse, but can be used for all fuse words.

Rename the structure to a more generic name to be reused for other
fuses.

Signed-off-by: Paul Geurts &lt;paul.geurts@prodrive-technologies.com&gt;
</content>
</entry>
</feed>
