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<title>u-boot.git/arch/arm/include/asm/system.h, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/system.h?h=v2020.01</id>
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<updated>2019-07-24T18:15:38Z</updated>
<entry>
<title>psci: Fix warnings when compiling with W=1</title>
<updated>2019-07-24T18:15:38Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2019-07-22T12:19:20Z</published>
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<id>urn:sha1:e21e3ffdd18b88a12d98f6ae985fd5d334b9cec9</id>
<content type='text'>
This patch solves the following warnings:
arch/arm/mach-stm32mp/psci.c:

warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes]

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>ARMv8: Enable all asynchronous abort exceptions taken to EL3</title>
<updated>2018-11-16T18:34:33Z</updated>
<author>
<name>Chee Hong Ang</name>
<email>chee.hong.ang@intel.com</email>
</author>
<published>2018-08-20T17:57:34Z</published>
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<id>urn:sha1:a7aab5bcb545950a25f1a9459a6c0acc7ac75b1e</id>
<content type='text'>
Allow EL3 to handle all the External Abort and SError interrupt
exception occur in all exception levels.

Signed-off-by: Chee Hong Ang &lt;chee.hong.ang@intel.com&gt;
</content>
</entry>
<entry>
<title>arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A</title>
<updated>2018-05-07T19:53:24Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2018-04-26T12:51:26Z</published>
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<id>urn:sha1:acf1500138bb6b0496fe09d6bffdf8eac3d6ecab</id>
<content type='text'>
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.

As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Suggested-by: Alexander Graf &lt;agraf@suse.de&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: make save_boot_params_ret prototype visible for AArch64</title>
<updated>2017-11-21T22:57:22Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-10-10T14:21:11Z</published>
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<id>urn:sha1:7776cc011df4565ed6cf0be65d33ccf28c2fffab</id>
<content type='text'>
The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).

This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Tested-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>armv8: layerscape: Enable falcon boot</title>
<updated>2017-10-09T15:48:45Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-09-28T15:42:14Z</published>
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<id>urn:sha1:fb97b8621e6c44e7762bf6f7fd82d1b00519d4fd</id>
<content type='text'>
Add jump_to_image_linux() for arm64. Add "noreturn" flag to
armv8_switch_to_el2(). Add hooks to fsl-layerscape to enable falcon
boot.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Łukasz Majewski &lt;lukma@denx.de&gt;
Tested-by: Łukasz Majewski &lt;lukma@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: Support cache invalidate</title>
<updated>2017-05-12T02:03:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-05T23:53:18Z</published>
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<id>urn:sha1:6775a8208e3ac60f09b982c2d7b3258e0af86540</id>
<content type='text'>
At present there is not operation to invalidate a cache range. This seems
to be needed to fill out the cache operations. Add an implementation based
on the flush operation.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: mmu: Add a function to change mapping attributes</title>
<updated>2017-03-14T15:44:03Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-03-06T17:02:33Z</published>
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<id>urn:sha1:7f9b9f318ff152bd8d2e8b573708e2bdc088c1b1</id>
<content type='text'>
Function mmu_change_region_attr() is added to change existing mapping
with updated PXN, UXN and memory type. This is a break-before-make
process during which the mapping becomes fault (invalid) before final
attributres are set.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: aarch64: Fix the warning about x1-x3 nonzero issue</title>
<updated>2017-01-18T17:29:33Z</updated>
<author>
<name>Alison Wang</name>
<email>b18965@freescale.com</email>
</author>
<published>2017-01-17T01:39:17Z</published>
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<id>urn:sha1:7c5e1feb1d780cc857632c246e78ac7a8e6cf2d7</id>
<content type='text'>
For 64-bit kernel, there is a warning about x1-x3 nonzero in violation
of boot protocol. To fix this issue, input argument 4 is added for
armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will
be set to the right value, such as zero.

Signed-off-by: Alison Wang &lt;alison.wang@nxp.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>ARMv8: Setup PSCI memory and device tree</title>
<updated>2016-12-15T19:57:51Z</updated>
<author>
<name>macro.wave.z@gmail.com</name>
<email>macro.wave.z@gmail.com</email>
</author>
<published>2016-12-08T03:58:25Z</published>
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<id>urn:sha1:9a561753ce48def18dbc4aa278c685c93ed0a77d</id>
<content type='text'>
Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right
place, this patch does all the setup steps.

Signed-off-by: Hongbo Zhang &lt;hongbo.zhang@nxp.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled</title>
<updated>2016-11-22T19:40:24Z</updated>
<author>
<name>Alison Wang</name>
<email>b18965@freescale.com</email>
</author>
<published>2016-11-10T02:49:05Z</published>
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<id>urn:sha1:3db86f4bbd7a723421c8c9bf9bd09d58e17e9736</id>
<content type='text'>
As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.

Signed-off-by: Alison Wang &lt;alison.wang@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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