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<title>u-boot.git/arch/arm/include/asm/system.h, branch v2021.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm/system.h?h=v2021.07</id>
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<updated>2021-03-02T20:53:37Z</updated>
<entry>
<title>arm: remove set_dacr/get_dacr functions</title>
<updated>2021-03-02T20:53:37Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-02-05T12:53:39Z</published>
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<id>urn:sha1:2740edaf47d615aa6ed99000c8a62fad8b8d34b2</id>
<content type='text'>
Remove the unused function set_dacr/get_dacr

Serie-cc: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Serie-cc: R Sricharan &lt;r.sricharan@ti.com&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
</content>
</entry>
<entry>
<title>arm: cosmetic: align TTB_SECT define value</title>
<updated>2021-03-02T20:53:37Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-02-05T12:53:35Z</published>
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<id>urn:sha1:9b39d249e09a7d6b6ba3d77466e32d7b7d18e71f</id>
<content type='text'>
Align TTB_SECT define value with previous value.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
</content>
</entry>
<entry>
<title>arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGH</title>
<updated>2021-03-02T20:53:37Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-02-05T12:53:34Z</published>
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<id>urn:sha1:342e1abd5c009cb2e119965415eabb7aa5e4dcd9</id>
<content type='text'>
The normal memory (other that DCACHE_OFF) should be executable by default,
only the device memory (DCACHE_OFF) used for peripheral access should have
the bit execute never (TTB_SECT_XN_MASK).

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
</content>
</entry>
<entry>
<title>common: board_r: Drop initr_noncached wrapper</title>
<updated>2021-01-15T19:36:12Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2020-11-28T08:43:13Z</published>
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<id>urn:sha1:42d0d4223f991062f10d8b09e9268ed4cbcf271e</id>
<content type='text'>
Add a return value to noncached_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH</title>
<updated>2020-07-29T12:43:40Z</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2020-07-07T10:07:07Z</published>
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<id>urn:sha1:6744ace5b3831939e1f4f487946a6f823df00e1d</id>
<content type='text'>
The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently
defined as no-allocate for both reads and writes, which deviates from the
non-LPAE definition, and mostly defeats the purpose of enabling the caches
in the first place.

So align LPAE with !LPAE, and enable allocate-on-read for both. And while
at it, add some clarification about the meaning of the chosen values.

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: provide a function for boards init code to modify MMU virtual-physical map</title>
<updated>2020-07-10T18:10:43Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2020-06-03T12:43:42Z</published>
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<id>urn:sha1:d877f8fd0f0973451f5c48d37c5d7fb761075765</id>
<content type='text'>
Provide function for setting arbitrary virtual-physical MMU mapping
and cache settings for the given region.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: update comments to the common style</title>
<updated>2020-07-10T18:10:43Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2020-06-03T12:43:41Z</published>
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<id>urn:sha1:f5a9fcc602dddc80051f265898ef1f8275a58fdb</id>
<content type='text'>
Update the comments in include/asm/system.h to the common style.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: use correct argument size of special registers</title>
<updated>2020-07-07T22:23:48Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-05-27T18:04:24Z</published>
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<id>urn:sha1:22a4e006be52fbd5249f46c36c4d8016c15b9fa7</id>
<content type='text'>
Compiling with clang on ARMv8 shows errors like:

./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
                asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
                                             ^~
                                             %w0

These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.

Mask off reserved bits when reading the exception level.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
</entry>
<entry>
<title>ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI</title>
<updated>2020-06-02T21:27:04Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-05-20T02:43:34Z</published>
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<id>urn:sha1:9f8aa0fbee40b66ceeaab06d3a0ce9a7a7d692a7</id>
<content type='text'>
arch/arm/include/asm/system.h declares psci_arch_init(), but it is
surrounded by #ifdef CONFIG_ARMV8_PSCI.

psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing
function declaration.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm: Don't include common.h in header files</title>
<updated>2020-05-18T18:54:24Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:39:55Z</published>
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<id>urn:sha1:c3dc39a2f85b16bf590789f7e283cd72275cd168</id>
<content type='text'>
It is bad practice to include common.h in other header files since it can
bring in any number of superfluous definitions. It implies that some C
files don't include it and thus may be missing CONFIG options that are set
up by that file. The C files should include these themselves.

Update some header files in arch/arm to drop this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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