u-boot.git/arch/arm/include/asm, branch v2014.07Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm?h=v2014.072014-07-11T18:54:48ZMerge branch 'master' of git://www.denx.de/git/u-boot-imx2014-07-11T18:54:48ZTom Rinitrini@ti.com2014-07-11T18:54:48Zurn:sha1:84f24ac8278d287581e5a559a7299e1dc2b53481i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT102014-07-10T13:23:56ZEric Nelsoneric.nelson@boundarydevices.com2014-07-09T19:27:29Zurn:sha1:e153333eeb50021fb3a730a3216c1968e7710999
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.
These settings now match the i.MX6 Dual and Quad core versions.
Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x2014-07-09T20:11:51ZFelipe Balbibalbi@ti.com2014-06-23T22:18:24Zurn:sha1:5ba95541b700d2edecb4d97d4b905f51ed8551b3
Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
am43xx: Tune the system to avoid DSS underflows2014-07-07T23:42:34ZCooper Jr., Franklinfcooper@ti.com2014-06-27T18:31:15Zurn:sha1:8038b497e742af2845523ed09b560bfc8cb42089
* This is done by limiting the ARM's bandwidth and setting DSS priority in
the EMIF controller to ensure underflows do not occur.
am43xx: Update EMIF DDR3 Configuration for AM43x GP2014-07-07T23:42:34ZFranklin S. Cooper Jrfcooper@ti.com2014-06-27T18:31:14Zurn:sha1:2c95211167091e543e20f4f457d3d1f1f660a6d4
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Merge branch 'master' of git://git.denx.de/u-boot-i2c2014-07-07T14:10:52ZTom Rinitrini@ti.com2014-07-07T14:10:52Zurn:sha1:6ee3d00d1d9d9977e975bd72c3668ee4f210a99darm: Fix armv8 compilation error2014-07-05T07:30:20ZShaibal.Duttashaibal.dutta@broadcom.com2014-06-09T20:25:52Zurn:sha1:fe0d9252999f3ce95185d275690e554296139ac3
Fix following compilation error when CONFIG_ARM64 is defined
Error: unknown or missing system register name at operand 2
-- `mrs x0,daifmsr daifset,#3'
Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com>
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Darwin Rambo <drambo@broadcom.com>
arm: spl: fix include guard2014-07-05T07:28:21ZJeroen Hofsteejeroen@myspectrum.nl2014-06-11T20:01:48Zurn:sha1:ed6c7f7f6ed23fce046c19d7a0f8dea66a973081
cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
socfpga: Adding Scan Manager driver2014-07-04T22:27:27ZChin Liang Seeclsee@altera.com2014-06-10T06:17:42Zurn:sha1:dc4d4aa14be278eaf7354c2916da6c5e7a538828
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
socfpga: Adding DesignWare watchdog support2014-07-04T22:24:18ZChin Liang Seeclsee@altera.com2014-06-10T06:11:04Zurn:sha1:05b884b5cd56478ba617b5c6a0538efe590fe098
To enable the DesignWare watchdog support at SOCFPGA
Cyclone V dev kit.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>