u-boot.git/arch/arm/include/asm, branch v2016.03-rc2Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm?h=v2016.03-rc22016-02-14T13:39:32ZMerge branch 'master' of git://git.denx.de/u-boot-uniphier2016-02-14T13:39:32ZTom Rinitrini@konsulko.com2016-02-14T13:39:32Zurn:sha1:823ecd72bb08344acc7d076ba13864eb0e18ba61spl: define BOOT_DEVICE_USB2016-02-14T07:36:13ZMasahiro Yamadayamada.masahiro@socionext.com2016-02-02T10:12:31Zurn:sha1:494456bc674d8543bd8d4dcf47347a0cc992d87c
This enum is referenced from common/spl/spl.c.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
zynqmp: nand: Add Nand driver support for zynqmp2016-02-12T23:27:28ZSiva Durga Prasad Paladugusiva.durga.paladugu@xilinx.com2015-11-17T09:00:09Zurn:sha1:78cb965af088f992930ff2a3e0967acd1f0ad87b
Add nand driver support for zynqmp. The Nand
controller used in ZynqMP is Arasan Nand Flash
controller.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[scottwood: Fix checkpatch warning]
Signed-off-by: Scott Wood <oss@buserror.net>
serial: serial_stm32: move clock config from driver to board2016-02-08T15:10:36ZVikas Manochavikas.manocha@st.com2016-01-27T02:12:20Zurn:sha1:dffceb4b15e4c5fd2487e625a08062a8120bd17f
This patch removes the uart clock enable from serial driver & move it in the
board code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mx6: soc: Add ENET2 mac address support2016-02-02T20:03:59ZYe Liye.li@nxp.com2016-02-01T02:41:31Zurn:sha1:d4d1dd674977fc7be30bd1f113b564247236ed60
The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading
MAC address from fuse for ENET2.
Signed-off-by: Ye Li <ye.li@nxp.com>
arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL2016-02-02T19:58:46ZMarek Vasutmarex@denx.de2015-12-16T14:40:06Zurn:sha1:d339f16911c790196f5aaea3682819b9c03633bb
Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
fine-tunes the behavior of the MMDC controller in order to improve
the signal integrity and memory stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq2016-02-02T11:51:05ZTom Rinitrini@konsulko.com2016-02-02T11:51:05Zurn:sha1:008e61f5120e7d3acb937953b1322e3aee3160d4arm8: ls2080: Move the core errata defines out of board specific file2016-02-01T21:59:55ZAshish kumarAshish.kumar@nxp.com2016-01-29T11:10:08Zurn:sha1:7711cc0a0648e215571b1d1768381963d92a1d97
Valid for core A57
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
armv8: ls2080a: Implement workaround for core errata 829520, 8334712016-02-01T21:58:22ZAshish kumarAshish.kumar@nxp.com2016-01-27T12:39:32Zurn:sha1:2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0
829520: Code bounded by indirect conditional branch might corrupt
instruction stream.
Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect
Predictor.
833471: VMSR FPSCR functional failure or deadlock.
Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arm: Remove S bit from MMU section entry2016-01-31T15:32:56ZMarek Vasutmarex@denx.de2015-12-29T18:44:02Zurn:sha1:8890c2fbe6ed4c5ca9a61f21e846a55f8f2c38fc
Restore the old behavior of the MMU section entries configuration,
which is without the S-bit.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Simon Glass <sjg@chromium.org>