u-boot.git/arch/arm/include/asm, branch v2018.07

usb: sunxi: Use proper reg_mask for clock gate, reset

2018-06-29T08:52:18Z

Masking clock gate, reset register bits based on the probed controller is proper only due to the assumption that masking should start with 0 even thought the controller has separate PHY or shared between OTG. unfortunately these are fixed due to lack of separate clock, reset drivers. Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) so we need to start reg_mask 0 - 2. This patch calculated the mask, based on the register base so that we can get the proper bits to set with respect to probed controller. We even do this masking by using PHY index specifier from dt, but dev_read_addr_size is failing for 64-bit boards. Signed-off-by: Jagan Teki

sunxi: Fix USB PHY index for H3

2018-06-29T08:52:18Z

This patch update the USB PHY index for Allwinner H3. Same change[1] initially sent, by 'Chen-Yu Tai' but missed to apply due to recursive version changes on the same series. [1] https://lists.denx.de/pipermail/u-boot/2018-January/318817.html Signed-off-by: Jagan Teki

meson: use the clock driver

2018-06-19T11:31:47Z

Use the clk framework to initialize clocks from drivers that need them instead of having hardcoded frequencies and initializations from board code. Signed-off-by: Beniamino Galvani Signed-off-by: Neil Armstrong

clk: add Amlogic meson clock driver

2018-06-19T11:31:47Z

Introduce a basic clock driver for Amlogic Meson SoCs which supports enabling/disabling clock gates and getting their frequency. Signed-off-by: Beniamino Galvani Signed-off-by: Neil Armstrong

sunxi: clock: Fix EHCI and OHCI clocks on A64

2018-06-13T05:33:42Z

EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29 Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5") Signed-off-by: Vasily Khoruzhick

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

2018-06-04T12:55:00Z

Define board_quiesce_devices() in a shared location

2018-06-03T13:27:21Z

This undocumented function relies on arch-specific code to declare a nop weak version. Add the weak function in common code instead to avoid having to duplicate the same function in each arch. Signed-off-by: Simon Glass Signed-off-by: Alexander Graf

fpga: zynqmp: Add secure bitstream loading for ZynqMP

2018-06-01T09:37:31Z

This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek

arm64: zynqmp: Get rid of emulation platforms

2018-05-31T11:50:39Z

ZynqMP emulation platforms are no longer tested and supported that's why remove macros and code around. Signed-off-by: Michal Simek

arm64: zynqmp: Show reset reason

2018-05-31T11:50:39Z

Read reset reason reg and show it in log and also save it as variable. Clearing reset reason when it is read to show only one status Signed-off-by: Michal Simek