u-boot.git/arch/arm/include/asm, branch v2019.04

armv7: ls102xa: Add workaround for DDR erratum A-008850

2019-03-15T06:22:01Z

Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu Signed-off-by: Alison Wang Reviewed-by: Prabhakar Kushwaha

armv8: fsl-layerscape: avoid DT fixup warning

2019-03-03T16:31:14Z

sec_firmware reserves JR3 for it's own usage and deletes the JR3 node from the device tree. This causes this warning to be issued when doing the device tree fixup: WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND. Fix it by excluding the device tree fixup for the JR reserved by sec_firmware. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geanta Reviewed-by: Bharat Bhushan Reviewed-by: Prabhakar Kushwaha

armv8: fsl-layerscape: fix SEC QI ICID setup

2019-03-03T16:31:09Z

The SEC QI ICID setup in the QIIC_LS register is actually an offset that is being added to the ICID coming from the qman portal. Setting it with a non-zero value breaks SMMU setup as the resulting ICID is not known. On top of that, the SEC QI ICID must match the qman portal ICIDs in order to share the isolation context. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geanta Reviewed-by: Bharat Bhushan Reviewed-by: Prabhakar Kushwaha

armv8: layerscape: move TZASC and TZPC configs to Kconfig

2019-02-19T04:56:44Z

Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig for LS1088A and LS2088A platforms. Signed-off-by: Rajesh Bhagat Reviewed-by: Prabhakar Kushwaha

lx2160aqds : Add support for LX2160AQDS platform

2019-02-19T04:56:44Z

LX2160AQDS is a development board that supports LX2160A family SoCs. This patch add base support for this board. Signed-off-by: Wasim Khan Signed-off-by: Sriram Dash Signed-off-by: Pankaj Bansal Signed-off-by: Udit Agarwal [PK: Sqaush patch for "secure boot defconfig" & add maintainer] Signed-off-by: Prabhakar Kushwaha

armv8: lx2160a: Update CONFIG_SYS_FSL_PEBUF_BASE

2019-02-19T04:56:43Z

As per hardware documentation, CONFIG_SYS_FSL_PEBUF_BASE for lx2160a is 0x1c00000000 Signed-off-by: Priyanka Jain Reviewed-by: Prabhakar Kushwaha

usb: Rename SPL_USB_SUPPORT to SPL_USB_STORAGE

2019-02-15T21:01:15Z

Since there is the SPL_USB_HOST_SUPPORT for enabling USB support in SPL, makes more sense to rename the SPL_USB_SUPPORT as SPL_USB_STORAGE. Everything that is not part of the usb storage support in SPL is now build under SPL_USB_HOST_SUPPORT. Signed-off-by: Abel Vesa Reviewed-by: Tom Rini Reviewed-by: Fabio Estevam Reviewed-by: Lukasz Majewski

ddr: vybrid: Add DDRMC calibration related registers (DQS to DQ)

2019-02-15T11:16:50Z

This commit provides extra defines needed for DDR memory controller calibration (read leveling performing). Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Agner

rockchip: Add support for chromebook_bob

2019-02-01T15:59:13Z

Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports for both power and external display. It includes a Chrome OS EC (Cortex-M3) to provide access to the keyboard and battery functions. Support so far includes only: - UART - SDRAM - MMC, SD card - Cros EC (but not keyboard) Not included: - Keyboard - Display - Sound - USB - TPM Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support for this is not provided in this series. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich

rockchip: Implement spl_gpio in the GPIO driver

2019-02-01T15:59:13Z

Allow rockchip boards to use GPIOs before driver model is ready. This is really only useful for setting GPIOs to enable the early debug console, if needed on some platforms. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich