<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/include/asm, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include/asm?h=v2023.01</id>
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<updated>2022-12-19T02:56:12Z</updated>
<entry>
<title>rockpi4: board: Add firmware image information for capsule updates</title>
<updated>2022-12-19T02:56:12Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2022-11-10T09:19:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e86c789ca372b52e5872d9c9d5081be420cc4b6b'/>
<id>urn:sha1:e86c789ca372b52e5872d9c9d5081be420cc4b6b</id>
<content type='text'>
Add information that will be needed for enabling the UEFI capsule
update feature on the RockPi4 boards. With the feature enabled, it
would be possible to update the idbloader and u-boot.itb images on the
RockPi4B and RockPi4C variants.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>ram: ast2600: Align the RL and WL setting</title>
<updated>2022-11-24T21:26:01Z</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2022-11-11T07:30:08Z</published>
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<id>urn:sha1:8c7b55724c6f9deb6d8a291cba7f932373313b57</id>
<content type='text'>
Use macro to represent the RL and WL setting to ensure the PHY and
controller setting are aligned.

Review-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;
Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20221114' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2022-11-14T14:33:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-11-14T12:29:51Z</published>
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<id>urn:sha1:c4ee4fe92e9be120be6d12718273dec6b63cc7d9</id>
<content type='text'>
For 2022.01
-----------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083

- Fix UART
- moved to binman (MX8 boards)
- Toradex: sync DTS with Linux
- Gateworks: fixes
- New boards : MSC SM2S iMX8MP
</content>
</entry>
<entry>
<title>global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:13Z</published>
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<id>urn:sha1:6cc04547cb3bbd3a3d78947f200acbae19e3c67f</id>
<content type='text'>
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP</title>
<updated>2022-11-07T21:45:05Z</updated>
<author>
<name>Martyn Welch</name>
<email>martyn.welch@collabora.com</email>
</author>
<published>2022-10-25T09:54:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c92c3a4453b86d977b529b9c48db94a2a1b0b8d0'/>
<id>urn:sha1:c92c3a4453b86d977b529b9c48db94a2a1b0b8d0</id>
<content type='text'>
The i.MX8MP SoC contains 2 more i2c buses. Add support for the
configuration of these buses.

Signed-off-by: Martyn Welch &lt;martyn.welch@collabora.com&gt;
</content>
</entry>
<entry>
<title>imx8m: USDHC3 base address definition for i.MX8MP</title>
<updated>2022-11-07T21:45:05Z</updated>
<author>
<name>Martyn Welch</name>
<email>martyn.welch@collabora.com</email>
</author>
<published>2022-10-25T09:54:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03a7a8297026048e4b78a04af809e42467e839a3'/>
<id>urn:sha1:03a7a8297026048e4b78a04af809e42467e839a3</id>
<content type='text'>
The i.MX8MP also has USDHC3, allow access to the relvant base address
definition.

Signed-off-by: Martyn Welch &lt;martyn.welch@collabora.com&gt;
</content>
</entry>
<entry>
<title>Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE</title>
<updated>2022-10-31T15:01:31Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-10-21T00:22:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=984639039f4cfe32ec2cc531d6ace05326ac49eb'/>
<id>urn:sha1:984639039f4cfe32ec2cc531d6ace05326ac49eb</id>
<content type='text'>
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq</title>
<updated>2022-10-25T01:28:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-25T01:28:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3eebbd866bfa8e889e52d1734b574a585e076a5a'/>
<id>urn:sha1:3eebbd866bfa8e889e52d1734b574a585e076a5a</id>
<content type='text'>
Layerscape update
 - support sysreset,
 - de-select FSL_IFC when booting from SD
 - disable unused parts of ICID tables
 - reduce ns_dev size for csu
 - enable dma snooping for ls104x
 - nand driver fixups for ls1043ardb rev 7.0 boards.
</content>
</entry>
<entry>
<title>rockchip: px30: support debug uart on UART0</title>
<updated>2022-10-19T11:30:48Z</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@theobroma-systems.com</email>
</author>
<published>2022-09-15T10:12:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0af506625ff909b123a298e435a95ae1b8ee3e7'/>
<id>urn:sha1:d0af506625ff909b123a298e435a95ae1b8ee3e7</id>
<content type='text'>
UART0 can obviously also be used for debug uart in U-Boot, so let's add
its support.

Cc: Quentin Schulz &lt;foss+uboot@0leil.net&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arm: layerscape: Disable unused parts of ICID tables</title>
<updated>2022-10-18T01:32:52Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2022-10-17T15:45:11Z</published>
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<id>urn:sha1:3ed84e73fb59c592c4cdfe3b56cce5cecf30a7da</id>
<content type='text'>
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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