u-boot.git/arch/arm/include/asm, branch v2023.04

arm: rockchip: Add RK3588 arch core support

2023-02-28T10:07:28Z

The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet, SDIO3.0 I2C, UART, SPI, GPIO and PWM. Add arch core support for it. Signed-off-by: Jagan Teki Signed-off-by: Kever Yang

arm: rockchip: Add ioc header for rk3588

2023-02-28T10:07:28Z

Add IOC unit header include for rk3588. Signed-off-by: Steven Liu Signed-off-by: Joseph Chen Signed-off-by: Jagan Teki Reviewed-by: Kever Yang

clk: rockchip: pll: Add pll_rk3588 type for rk3588

2023-02-28T10:07:27Z

Add RK3588 pll set and get rate clock support. Signed-off-by: Elaine Zhang Signed-off-by: Jagan Teki Reviewed-by: Kever Yang

arm: rockchip: Add grf header for rk3588

2023-02-28T10:07:27Z

Add GRF header for Rockchip RK3588. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang

arm: rockchip: Add cru header for rk3588

2023-02-28T10:07:27Z

Add clock and reset unit header include for rk3588. Signed-off-by: Elaine Zhang Signed-off-by: Jagan Teki Reviewed-by: Kever Yang

rockchip: sdram: add basic support for sdram reg info version 3

2023-02-28T10:07:26Z

Newer DRAM initialization blobs from vendor can encode sdram info in a new version 3 format. The new format makes use of more bits in sys_reg3 compared to the version 2 format. Add basic support for detecting the version 3 format and decoding the high bits used for ddrtype. This fixes decode of sdram size on my RK3568 boards that have LPDDR4X. Details on the new format was deciphered from vendor u-boot commit [1]. [1] https://github.com/rockchip-linux/u-boot/commit/c69667e0e2bf4290ab1f408fcde58b8806ac266b Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang

ARM: tegra: crypto: extend crypto functional

2023-02-23T19:55:37Z

Add support for encryption, decryption and signinig with non-zero key saving backward compatibility. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom

ARM: tegra: create common pre-dm i2c write

2023-02-23T19:55:37Z

This implementation allows pwr i2c writing on early SPL stages when DM is not yet setup. Such writing is needed to configure main voltages of PMIC on early SPL for bootloader to boot properly. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # LG P895 T30 Tested-by: Thierry Reding # T30 and T124 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom

ARM: tegra: add late init support

2023-02-23T19:55:37Z

Late init function allows passing values like identifiers and perform device specific configurations of pre-boot stage. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom

ARM: tegra: clock: add clock_decode_pair helper

2023-02-23T19:55:36Z

Get periph clock id and its parent from device tree. This works by looking up the peripheral's 'clocks' node and reading out the second and fourth cells, which are the peripheral and PLL clock numbers. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # HTC One X Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom