u-boot.git/arch/arm/include, branch v2014.10

Merge branch 'u-boot/master' into 'u-boot-arm/master'

2014-10-10T23:20:30Z

ARM: keystone: clock: fix main pll ratio div definitions

2014-10-10T13:44:42Z

The definitions for div ratio supposed to be in hex and were added in dec by mistake. Signed-off-by: Ivan Khoronzhuk

Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

2014-10-10T06:56:01Z

Merge remote-tracking branch 'u-boot-imx/master'

2014-10-08T19:20:49Z

The single file conflict below is actually trivial. Conflicts: board/boundary/nitrogen6x/nitrogen6x.c

samsung: Enable device tree for s5p_goni

2014-10-08T08:25:47Z

Change this board to add a device tree. This also adds a pinmux header file although it is not used as yet. Signed-off-by: Simon Glass Signed-off-by: Minkyu Kang

Merge branch 'master' of git://git.denx.de/u-boot-arm

2014-10-07T11:38:39Z

vf610twr: Tune DDR initialization settings

2014-10-07T11:08:31Z

Removed settings in unsupported register fields. They didn’t do anything, and in most cases, were not documented in the reference manual. Changed register settings to comply with JEDEC required values. Changed timing parameters because they included full clock periods that were doing nothing. Signed-off-by: Anthony Felice [rebased on v2014.10-rc2] Signed-off-by: Stefan Agner

arm: socfpga: nic301: Add NIC-301 GPV register file

2014-10-06T15:46:50Z

Add register definition for the NIC-301 used on SoCFPGA. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Albert Aribaud Cc: Tom Rini Cc: Wolfgang Denk Cc: Pavel Machek Acked-by: Pavel Machek

arm: socfpga: scu: Add SCU register file

2014-10-06T15:46:50Z

Add the Snoop Control Unit register definition file. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Albert Aribaud Cc: Tom Rini Cc: Wolfgang Denk Cc: Pavel Machek Acked-by: Pavel Machek

arm: socfpga: reset: Add function to reset FPGA bridges

2014-10-06T15:46:50Z

Add function to enable and disable FPGA bridges. This code is used by the FPGA manager to disable the bridges before programming the FPGA and will later be also used by the initialization code for the chip to put the chip into well defined state during startup. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Albert Aribaud Cc: Tom Rini Cc: Wolfgang Denk Cc: Pavel Machek Acked-by: Pavel Machek