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<title>u-boot.git/arch/arm/include, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>arm: Fix setjmp (again)</title>
<updated>2016-07-08T21:16:38+00:00</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-07-05T18:37:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0de02de76833cf3adcc0ba2e43cff52e6e18b63f'/>
<id>0de02de76833cf3adcc0ba2e43cff52e6e18b63f</id>
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Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.

So this patch adds the required alignment hooks to make compilation
work again even when setjmp doesn't happen to be 4 byte aligned.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Tested-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.

So this patch adds the required alignment hooks to make compilation
work again even when setjmp doesn't happen to be 4 byte aligned.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Tested-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</entry>
<entry>
<title>sunxi: Add missing boot_media fields in the SPL header</title>
<updated>2016-07-02T11:53:03+00:00</updated>
<author>
<name>Olliver Schinagl</name>
<email>oliver@schinagl.nl</email>
</author>
<published>2016-06-13T16:13:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9acebe8a18788c5a0d7b154e812cf2d9dfbab68f'/>
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Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h

Signed-off-by: Olliver Schinagl &lt;oliver@schinagl.nl&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h

Signed-off-by: Olliver Schinagl &lt;oliver@schinagl.nl&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-06-28T19:59:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-28T19:59:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=44faff24f58859bdc1acf28ac739020b5091678a'/>
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<pre>
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</entry>
<entry>
<title>armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCs</title>
<updated>2016-06-28T19:08:53+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar.kushwaha@nxp.com</email>
</author>
<published>2016-06-24T08:18:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=49cdce163519ad760ca7769be64dd2a6133a5c11'/>
<id>49cdce163519ad760ca7769be64dd2a6133a5c11</id>
<content type='text'>
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.

So append "A" to SoC names.

Signed-off-by: Pratiyush Mohan Srivastava &lt;pratiyush.srivastava@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.

So append "A" to SoC names.

Signed-off-by: Pratiyush Mohan Srivastava &lt;pratiyush.srivastava@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: bcm235xx: implement the boot0 hook code</title>
<updated>2016-06-24T21:24:37+00:00</updated>
<author>
<name>Steve Rae</name>
<email>srae@broadcom.com</email>
</author>
<published>2016-06-21T23:43:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9d7f416cedb5e9d7a809952e9483e05de5d30eda'/>
<id>9d7f416cedb5e9d7a809952e9483e05de5d30eda</id>
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Choose the Kconfig boot0 hook option and implement the required code.

Signed-off-by: Steve Rae &lt;srae@broadcom.com&gt;
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<pre>
Choose the Kconfig boot0 hook option and implement the required code.

Signed-off-by: Steve Rae &lt;srae@broadcom.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sunxi: Add base address for GIC</title>
<updated>2016-06-20T20:44:00+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-06-07T02:54:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3424c3f29970beaa3810acbc6ba3b8062a71ef09'/>
<id>3424c3f29970beaa3810acbc6ba3b8062a71ef09</id>
<content type='text'>
Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: Add CPUCFG debug lock and sun7i cpu power controls</title>
<updated>2016-06-20T20:44:00+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-06-07T02:54:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7579a3ec8c655b57f072c44c92f281fdc5401450'/>
<id>7579a3ec8c655b57f072c44c92f281fdc5401450</id>
<content type='text'>
CPUCFG has an unlisted debug control register, which is used to disable
external debug access.

Also, sun7i secondary core power controls are in CPUCFG, as there's no
separate PRCM block.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
CPUCFG has an unlisted debug control register, which is used to disable
external debug access.

Also, sun7i secondary core power controls are in CPUCFG, as there's no
separate PRCM block.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: Group cpu core related controls together</title>
<updated>2016-06-20T20:44:00+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-06-07T02:54:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=20e3d05370b75bc71b74765adc80de35ad2d2ec7'/>
<id>20e3d05370b75bc71b74765adc80de35ad2d2ec7</id>
<content type='text'>
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.

Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.

Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sunxi: Add missing linux/types.h header for cpucfg_sun6i.h</title>
<updated>2016-06-20T20:44:00+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-06-07T02:54:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=57c2a255725a033407835cc596158a153c255bc1'/>
<id>57c2a255725a033407835cc596158a153c255bc1</id>
<content type='text'>
cpucfg_sun6i.h includes a register definition for the CPUCFG register
block. The types used are u32 and u8, which are defined in linux/types.h.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
cpucfg_sun6i.h includes a register definition for the CPUCFG register
block. The types used are u32 and u8, which are defined in linux/types.h.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: Add packed attribute to struct sunxi_prcm_reg</title>
<updated>2016-06-20T20:44:00+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-06-07T02:54:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7d4e5ccd646538a735ea97b446a9453ab49cc17'/>
<id>d7d4e5ccd646538a735ea97b446a9453ab49cc17</id>
<content type='text'>
struct sunxi_prcm_reg is a representation of the PRCM registers. Add
the packed attribute to prevent the compiler from doing funny things.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
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<pre>
struct sunxi_prcm_reg is a representation of the PRCM registers. Add
the packed attribute to prevent the compiler from doing funny things.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
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