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<title>u-boot.git/arch/arm/include, branch v2018.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-sunxi</title>
<updated>2018-10-29T15:21:00+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-10-29T15:21:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2f07a9a6d1abd1eeb283a21a8d718dc9628429a4'/>
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<pre>
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<entry>
<title>sunxi: store DRAM size in SPL header</title>
<updated>2018-10-29T15:11:15+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2018-10-25T09:23:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5776610e9ef022e2d8a15793d4b9955c3f8076ed'/>
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At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.

As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.

Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
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<pre>
At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.

As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.

Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sunxi: Extend SPL header versioning</title>
<updated>2018-10-29T15:11:15+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2018-10-25T09:23:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=55d481d2014f79a692ac82a10a439dc71acc732c'/>
<id>55d481d2014f79a692ac82a10a439dc71acc732c</id>
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On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.

Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.

[1] https://semver.org

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
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<pre>
On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.

Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.

[1] https://semver.org

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx</title>
<updated>2018-10-25T14:16:21+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-10-25T14:16:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf033e04da315ba949e804c127abae0134bda30f'/>
<id>cf033e04da315ba949e804c127abae0134bda30f</id>
<content type='text'>
Merged imx8 architecture, fix build for imx8 + warnings
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merged imx8 architecture, fix build for imx8 + warnings
</pre>
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</content>
</entry>
<entry>
<title>watchdog: aspeed: restore default value of reset_mask</title>
<updated>2018-10-22T13:18:49+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2018-10-16T11:57:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e1a8dfde5a1efa5158bd7740ef6cbb8abc12a27f'/>
<id>e1a8dfde5a1efa5158bd7740ef6cbb8abc12a27f</id>
<content type='text'>
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>power: Add power domain driver for i.MX8</title>
<updated>2018-10-22T10:59:01+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2018-10-18T12:28:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d526f340f702b338389f1b858cdd114fffbcd7b5'/>
<id>d526f340f702b338389f1b858cdd114fffbcd7b5</id>
<content type='text'>
Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
need to add power domain trees with property "compatible = "nxp,imx8-pd";"

When power on a PD device, the driver will power on its ancestor PD
devices in power domain tree.

When power off a PD device, the driver will check its child PD devices
first. Only if all child PD devices are off, then power off the current PD
device. Then the driver checks sibling PD devices. If sibling PD devices
are off, then it will power off parent PD device.

There is no counter maintained in this driver, but a state to hold current
on/off state. So the request and free functions are empty.

The power domain implementation in i.MX8 DTB set the "#power-domain-cells"
to 0, so there is no ID binding with each PD device. We don't use "id"
variable in struct power_domain. At the same time, we have to set of_xlate
to empty to bypass standard of_xlate in uclass driver.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
need to add power domain trees with property "compatible = "nxp,imx8-pd";"

When power on a PD device, the driver will power on its ancestor PD
devices in power domain tree.

When power off a PD device, the driver will check its child PD devices
first. Only if all child PD devices are off, then power off the current PD
device. Then the driver checks sibling PD devices. If sibling PD devices
are off, then it will power off parent PD device.

There is no counter maintained in this driver, but a state to hold current
on/off state. So the request and free functions are empty.

The power domain implementation in i.MX8 DTB set the "#power-domain-cells"
to 0, so there is no ID binding with each PD device. We don't use "id"
variable in struct power_domain. At the same time, we have to set of_xlate
to empty to bypass standard of_xlate in uclass driver.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: mxc_gpio: add support for i.MX8</title>
<updated>2018-10-22T10:59:01+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2018-10-18T12:28:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b2a31f13362521e65ccb4c7d73db467068e8e6a'/>
<id>8b2a31f13362521e65ccb4c7d73db467068e8e6a</id>
<content type='text'>
Add i.MX8 support, there are 8 GPIO banks.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add i.MX8 support, there are 8 GPIO banks.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx8: add dummy clock</title>
<updated>2018-10-22T10:59:01+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2018-10-18T12:28:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d58296f3ec93b9d9ff862eb6e656af1f7cd8c47'/>
<id>2d58296f3ec93b9d9ff862eb6e656af1f7cd8c47</id>
<content type='text'>
This driver is mostly used to avoid build errors.
We use uclass clk driver for clk related operations.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<pre>
This driver is mostly used to avoid build errors.
We use uclass clk driver for clk related operations.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx8: add iomux configuration api</title>
<updated>2018-10-22T10:59:01+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2018-10-18T12:28:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=abeebc19dbe0445793dab45d48dc60541e58fe6a'/>
<id>abeebc19dbe0445793dab45d48dc60541e58fe6a</id>
<content type='text'>
Add iomux configuration api.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add iomux configuration api.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx8: cpu: add uclass based CPU driver</title>
<updated>2018-10-22T10:59:01+00:00</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2018-10-18T12:28:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2fdb1a1df925f885afc677e61755125844a9b7ef'/>
<id>2fdb1a1df925f885afc677e61755125844a9b7ef</id>
<content type='text'>
print_cpuinfo() in board init code requires uclass CPU driver,
add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO
option is enabled. CPU node in DT will have to include 'clocks'
and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo()
to work as expected. The driver outputs info for i.MX8QXP Rev A
and Rev B CPUs.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
print_cpuinfo() in board init code requires uclass CPU driver,
add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO
option is enabled. CPU node in DT will have to include 'clocks'
and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo()
to work as expected. The driver outputs info for i.MX8QXP Rev A
and Rev B CPUs.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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