u-boot.git/arch/arm/include, branch v2020.01

sunxi: remove __packed from struct sunxi_prcm_reg

2019-12-18T14:49:58Z

struct sunxi_prcm_reg is naturally packed. There is no need to define it as packed. Defining it as packed leads to compilation errors with GCC 9.2.1: CC arch/arm/lib/reloc_arm_efi.o arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: :qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 163 | sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~~~ Remove __packed attribute from struct sunxi_prcm_reg. Signed-off-by: Heinrich Schuchardt

Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

2019-12-09T15:32:08Z

Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support

ARM: mx6: pmu: Expose PMU LDO configuration interface

2019-12-06T12:57:42Z

Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut Cc: Eric Nelson Cc: Fabio Estevam Cc: Stefano Babic Reviewed-by: Eric Nelson

board: colibri_imx7: reserve DDR memory for Cortex-M4

2019-12-06T11:09:30Z

i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Use the linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. Signed-off-by: Stefan Agner Signed-off-by: Igor Opaniuk Reviewed-by: Oleksandr Suvorov

mx7ulp: scg: Remove unnused scg_a7_apll_init()

2019-12-06T11:05:08Z

scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam

pwm: rk_pwm: Make PWM driver to support all Rockchip Socs

2019-12-05T16:06:23Z

This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3328 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: David Wu Reviewed-by: Kever Yang

rockchip: px30: Add support for using UART3 as debug UART

2019-12-05T15:53:07Z

Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: Paul Kocialkowski Reviewed-by: Kever Yang Reviewed-by: Heiko Stuebner

rockchip: px30: Fixup PMUGRF registers layout order

2019-12-05T15:53:07Z

According to the PX30 TRM, the iomux registers come first, before the pull and strength control registers. Signed-off-by: Paul Kocialkowski Reviewed-by: Kever Yang Reviewed-by: Heiko Stuebner

arm: drop eSDHC clock getting in mxc_get_clock() for layerscape

2019-11-27T08:55:56Z

Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain

arm: rockchip: Add RK3308 SOC support

2019-11-17T09:22:53Z

RK3308 is a quad Cortex A35 based SOC with rich audio interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which designed for intelligent voice interaction and audio input/output processing. Signed-off-by: Andy Yan Reviewed-by: Kever Yang