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<title>u-boot.git/arch/arm/include, branch v2020.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include?h=v2020.10</id>
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<updated>2020-09-17T12:40:22Z</updated>
<entry>
<title>imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 support</title>
<updated>2020-09-17T12:40:22Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2020-09-16T07:17:22Z</published>
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<id>urn:sha1:0098222dacd6fd2bdc6f99adc366397a7ed8bb6a</id>
<content type='text'>
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx8mq: fix SSCG_PLL_REFCLK_SEL_x</title>
<updated>2020-09-17T12:40:10Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2020-09-16T07:17:20Z</published>
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<id>urn:sha1:ece7844d8fbd67d078e1cb2d6807b913a2025a0c</id>
<content type='text'>
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16

Reported-by: Coverity 3448860
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx8mq: fix FRAC_PLL_REFCLK_SEL_MASK</title>
<updated>2020-09-17T12:40:04Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2020-09-16T07:17:19Z</published>
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<id>urn:sha1:d81e8cf6eaebbb0a67857224781f6f7470785422</id>
<content type='text'>
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.

Reported-by: Coverity 10045172
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx7: ccm: correct target interface num</title>
<updated>2020-09-17T12:39:55Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2020-09-16T07:17:18Z</published>
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<id>urn:sha1:95bae9ff920b6120bd2c21437517ed99a2d54b61</id>
<content type='text'>
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.

Reported-by: Coverity 18045
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20200825' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2020-08-26T03:12:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-08-26T03:12:43Z</published>
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<id>urn:sha1:7a1a01c6029039e4fa6aa185cdbbf9a357eecba7</id>
<content type='text'>
For 2020.10
-----------

- mx6: SOCs user selectable
       Fix for imx6q_logic
       Some DM conversion
- mx7: introduce secondary boot device

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell</title>
<updated>2020-08-25T17:38:29Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-08-25T14:24:40Z</published>
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<id>urn:sha1:9f9ecd3e4d7839e24c182fb7b24937e19b670f1b</id>
<content type='text'>
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC &amp; watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
</content>
</entry>
<entry>
<title>arm: octeontx2: Add headers for OcteonTX2</title>
<updated>2020-08-25T06:01:16Z</updated>
<author>
<name>Suneel Garapati</name>
<email>sgarapati@marvell.com</email>
</author>
<published>2019-10-20T01:35:54Z</published>
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<id>urn:sha1:04cd0a0fa03968405918fa6f6b695821767fb068</id>
<content type='text'>
Signed-off-by: Suneel Garapati &lt;sgarapati@marvell.com&gt;
</content>
</entry>
<entry>
<title>arm: octeontx: Add headers for OcteonTX</title>
<updated>2020-08-25T06:01:16Z</updated>
<author>
<name>Suneel Garapati</name>
<email>sgarapati@marvell.com</email>
</author>
<published>2019-10-20T01:32:33Z</published>
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<id>urn:sha1:387d321add65e7a93422be434c48067fc7d69d86</id>
<content type='text'>
Signed-off-by: Suneel Garapati &lt;sgarapati@marvell.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: include/asm/io.h: Add 64bit clrbits and setbits helpers</title>
<updated>2020-08-25T06:01:16Z</updated>
<author>
<name>Suneel Garapati</name>
<email>sgarapati@marvell.com</email>
</author>
<published>2019-10-20T00:20:27Z</published>
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<id>urn:sha1:c2f45b6588f8dc85a63cccec0cabfa01ff76a0b8</id>
<content type='text'>
Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati &lt;sgarapati@marvell.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: armltd: Add support for Total Compute platform</title>
<updated>2020-08-24T18:11:31Z</updated>
<author>
<name>Usama Arif</name>
<email>usama.arif@arm.com</email>
</author>
<published>2020-08-12T15:12:53Z</published>
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<id>urn:sha1:565add124de00c994652a0d2d6d1eb6b2a7c9553</id>
<content type='text'>
Total Compute is based on ARM architecture and has
the following features enabled in u-boot:
- PL011 UART
- PL180 MMC
- NOR Flash
- FIT image with Signature
- AVB

Signed-off-by: Usama Arif &lt;usama.arif@arm.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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