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<title>u-boot.git/arch/arm/include, branch v2022.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include?h=v2022.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/include?h=v2022.01'/>
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<updated>2021-11-12T19:18:17Z</updated>
<entry>
<title>Remove CONFIG_SERIAL_MULTI</title>
<updated>2021-11-12T19:18:17Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-11-08T03:59:50Z</published>
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<id>urn:sha1:d3fb2e3991cb6f7b2fa663601a050e8acce12826</id>
<content type='text'>
This symbol has been functionally dead for a long time.  Remove the last
and recent re-introductions of setting it, and update the whitelist so
it will not be re-introduced again.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-stm32-20211110' of https://source.denx.de/u-boot/custodians/u-boot-stm</title>
<updated>2021-11-10T19:11:30Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-11-10T19:11:30Z</published>
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<id>urn:sha1:166a77b34b30f64f7b12a3016b0bba49d568c52e</id>
<content type='text'>
- DHSOM update:
   - Remove nWP GPIO hog
   - Increase SF bus frequency to 50Mhz and enable SFDP
   - Disable video output for DHSOM
   - Disable EFI
   - Enable DFU_MTD support
- Create include file for STM32 gpio driver private data
- Split board and SOC STM32MP15 configuration
- Device tree alignement with v5.15-rc6 for STM32MP15
- Add binman support for STM32MP15x
- Normalise newlines for stm32prog
- Update OTP shadow registers in SPL
</content>
</entry>
<entry>
<title>gpio: stm32: create include file for driver private data</title>
<updated>2021-11-10T16:03:36Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-10-22T18:12:34Z</published>
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<id>urn:sha1:56a368f6610fec233e803367640cc8ea37251615</id>
<content type='text'>
The stm32 gpio driver private data are not needed in arch include files,
they are not used by code except for stm32 gpio and pincontrol drivers,
using the same IP; the defines for this IP is moved in a new file
"stm32_gpio_priv.h" in driver/gpio.

This patch avoids to have duplicated file gpio.h for each SOC
in MPU directory mach-stm32mp and in each MCU directory arch-stm32*
and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_HZ to Kconfig</title>
<updated>2021-11-05T15:23:29Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-10-31T03:03:49Z</published>
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<id>urn:sha1:1a77da4b333d25314a861d7be926848b084b8f02</id>
<content type='text'>
This converts the following to Kconfig:
	CONFIG_SYS_HZ

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>serial: s5p: Add Apple M1 support</title>
<updated>2021-10-31T12:46:44Z</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2021-10-23T14:58:04Z</published>
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<id>urn:sha1:d520e1fb7276d9d14f3cf35e028c5fdb934b049c</id>
<content type='text'>
Apple M1 SoCs include an S5L UART which is a variant of the S5P
UART.  Add support for this variant and enable it by default
on Apple SoCs.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"</title>
<updated>2021-10-31T12:46:29Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2021-10-27T16:54:54Z</published>
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<id>urn:sha1:60b9b47d295b9f197d1dee2f893a8c49fcbee10e</id>
<content type='text'>
Stop using the device tree as a source for ad-hoc information.

This reverts commit 2ae7adc659f7fca9ea65df4318e5bca2b8274310.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20211020' of https://source.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2021-10-20T18:24:09Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-10-20T18:24:09Z</published>
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<id>urn:sha1:79b8849d4c1e73df2a79a1d5a5f6166d0dd67a12</id>
<content type='text'>
u-boot-imx-20211020
-------------------

First PR from u-boot-imx for 2022.01

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535

- new board: kontron-sl-mx8mm
- imx8m:
	- fix secure boot
- imx ESDHC: fixes
- i.MX53: Support thum2, bmode and fixes for Menlo board
	  usbarmory switch to Ethernet driver model
- imx6 :
	- DDR calibration for Toradex boards
- imx7:
	- Fixes
- Updated gateworks boards (ventana / venice)

# gpg verification failed.
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2021-10-18T01:13:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-10-18T01:13:49Z</published>
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<id>urn:sha1:d990f7d75d3dcf45a9220abc900495f00792f414</id>
<content type='text'>
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra</title>
<updated>2021-10-15T22:30:33Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-10-15T19:58:16Z</published>
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<id>urn:sha1:6a86f1212656d4497b8980048907535f5294fabe</id>
<content type='text'>
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: rk3568: update clks</title>
<updated>2021-10-15T12:57:31Z</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2021-10-12T08:43:00Z</published>
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<id>urn:sha1:f2cdd44adb9f06f455185b4882cfd91e8d75d58a</id>
<content type='text'>
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.

Change in V2:
remove change id.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
</feed>
