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<title>u-boot.git/arch/arm/include, branch v2025.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2024-11-09T11:53:36Z</updated>
<entry>
<title>imx: hab: Make imx_hab_is_enabled dependent on FIELD_RETURN</title>
<updated>2024-11-09T11:53:36Z</updated>
<author>
<name>Paul Geurts</name>
<email>paul.geurts@prodrive-technologies.com</email>
</author>
<published>2024-11-01T08:49:21Z</published>
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<id>urn:sha1:0bf7d6b4979835616f396337870d065543a2db4e</id>
<content type='text'>
The decision on whether HAB is enabled is solely based on the SEC_CONFIG
fuse. The HAB FIELD_RETURN feature is able to permanently disable HAB on
a CPU, after which it is able to boot unsigned firmware. U-Boot however
does not take into account the FIELD_RETURN mode, and refuses to boot
unsigned software when the feature is enabled.

Also take the FIELD_RETURN fuse into account when deciding whether HAB
is enabled. When The FIELD_RETURN fuse is blown, HAB is not enabled.

Tested on i.MX8M Mini, i.MX8M Plus, i.MX8M Nano and i.MX6ULL

Signed-off-by: Paul Geurts &lt;paul.geurts@prodrive-technologies.com&gt;
</content>
</entry>
<entry>
<title>imx: hab: rename imx_sec_config_fuse_t to imx_fuse</title>
<updated>2024-11-09T11:53:36Z</updated>
<author>
<name>Paul Geurts</name>
<email>paul.geurts@prodrive-technologies.com</email>
</author>
<published>2024-11-01T08:49:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0a245862c2ba7a4a63dc6f6c1afbdcdb50c4ed89'/>
<id>urn:sha1:0a245862c2ba7a4a63dc6f6c1afbdcdb50c4ed89</id>
<content type='text'>
The imx_sec_config_fuse_t structure is not specific to the sec_config
fuse, but can be used for all fuse words.

Rename the structure to a more generic name to be reused for other
fuses.

Signed-off-by: Paul Geurts &lt;paul.geurts@prodrive-technologies.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-master-20241029' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2024-10-30T00:46:08Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-30T00:46:08Z</published>
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<id>urn:sha1:5cca0e3f6e0ff17db92476235ea1bb9cd8cbc9eb</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23092

- Implement i.MX93 erratum fix on the dwc_eth_qos driver to fix RMII.
- Add support for Emcraft Systems NavQ+.
- Fix the size of IVT + CSF blob tacked on to u-boot.itb.
</content>
</entry>
<entry>
<title>Merge patch series "memory: ti-aemif: Add DM support"</title>
<updated>2024-10-30T00:45:51Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-30T00:45:51Z</published>
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<id>urn:sha1:2d79d1004d8d2ec8522c520dc205c8f199fd035e</id>
<content type='text'>
Bastien Curutchet &lt;bastien.curutchet@bootlin.com&gt; says:

Hi all,

This patch series aims to add DM support for the AEMIF controller that
can be found in the DaVinci SoCs.

This controller has already a driver used by the Keystone SoCs so I
add my work to it.

As we can now easily import Linux device-trees, I try to stick the
most I can to the Linux bindings of the AEMIF controller. To do so I add
an 'intermediate' driver called 'ti-aemif-cs'. It's in charge of
configuring timings for a given chip select of the AEMIF controller.

Link: https://lore.kernel.org/r/20241021151330.1860929-1-bastien.curutchet@bootlin.com
</content>
</entry>
<entry>
<title>memory: ti-aemif: Make AEMIF driver architecture agnostic</title>
<updated>2024-10-30T00:45:22Z</updated>
<author>
<name>Bastien Curutchet</name>
<email>bastien.curutchet@bootlin.com</email>
</author>
<published>2024-10-21T15:13:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ba44c8eed7c1c623f7010401bb0b8d2e59a8d8a'/>
<id>urn:sha1:1ba44c8eed7c1c623f7010401bb0b8d2e59a8d8a</id>
<content type='text'>
AEMIF controller is present on other SoCs than the Keystone ones.

Remove Keystone specificities from the driver to be able to use it from
other architectures.
Adapt the ks2_evm/board.c to fit the new driver.

Signed-off-by: Bastien Curutchet &lt;bastien.curutchet@bootlin.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>CONFIG_SYS_NONCACHED_MEMORY: Move prototypes to include/cpu_func.h for consistency</title>
<updated>2024-10-29T22:17:18Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-22T16:31:17Z</published>
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<id>urn:sha1:17e476aa0525905c52e48c19adcb54fdca60d48b</id>
<content type='text'>
Currently, a number of generic cache related functions have their common
prototype declared in include/cpu_func.h. Move the current set of
noncached functions there as well to match.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm64: imx: Fix 0Xnn to 0xnn</title>
<updated>2024-10-29T19:25:25Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2024-10-26T20:14:42Z</published>
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<id>urn:sha1:196315d4afa7d8b97ca64ec1cfd371b7e14dc4eb</id>
<content type='text'>
Use lowercase 0x prefix for hexadecimal number to be consistent
No functional change.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Implement ACPI on aarch64"</title>
<updated>2024-10-28T00:44:13Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-27T23:14:22Z</published>
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<id>urn:sha1:2800aecce08b47b169d8e9824dd23b1297b2cedc</id>
<content type='text'>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</content>
</entry>
<entry>
<title>arm: Implement read_mpidr on armv7</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=080be069f5fc4cd0f5a9fbf3e697e0a9ba3ca992'/>
<id>urn:sha1:080be069f5fc4cd0f5a9fbf3e697e0a9ba3ca992</id>
<content type='text'>
Implement read_mpidr() on armv7 to make use of it in generic
code that compiles on both armv7 and armv8.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: cpu: Add ACPI parking protocol support</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:13Z</published>
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<id>urn:sha1:34bfe8eff895b864247d923ce37110a9053592ee</id>
<content type='text'>
On Arm platforms that use ACPI they cannot rely on the "spin-table"
CPU bringup usually defined in the FDT. Thus implement the
'ACPI Multi-processor Startup for ARM Platforms', also referred to as
'ACPI parking protocol'.

The ACPI parking protocol works similar to the spin-table mechanism, but
the specification also covers lots of shortcomings of the spin-table
implementations.

Every CPU defined in the ACPI MADT table has it's own 4K page where the
spinloop code and the OS mailbox resides. When selected the U-Boot board
code must make sure that the secondary CPUs enter u-boot after relocation
as well, so that they can enter the spinloop code residing in the ACPI
parking protocol pages.

The OS will then write to the mailbox and generate an IPI to release the
CPUs from the spinloop code.

For now it's only implemented on ARMv8, but can easily be extended to
other platforms, like ARMv7.

TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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