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<title>u-boot.git/arch/arm/lib/bootm.c, branch v2014.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib/bootm.c?h=v2014.10</id>
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<updated>2014-08-30T11:46:40Z</updated>
<entry>
<title>arm64: Correct passing of Linux kernel args</title>
<updated>2014-08-30T11:46:40Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-08-14T10:42:35Z</published>
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<id>urn:sha1:3f1b6bebe0cbe71ad6beab3c7a00ab2f2b082ca7</id>
<content type='text'>
The Documentation/arm64/booting.txt document says that pass in x1/x2/x3
as 0 as they are reserved for future use.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: convert arch_fixup_memory_node to a generic FDT fixup function</title>
<updated>2014-07-28T15:19:49Z</updated>
<author>
<name>Ma Haijun</name>
<email>mahaijuns@gmail.com</email>
</author>
<published>2014-07-12T13:24:06Z</published>
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<id>urn:sha1:e29607ed972056723e4bf0ac90767421cf0f0b78</id>
<content type='text'>
Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.

[maz: collapsed 3 patches into one, rewrote commit message]

Signed-off-by: Ma Haijun &lt;mahaijuns@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Ian Campbell &lt;ijc@hellion.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: HYP/non-sec: allow relocation to secure RAM</title>
<updated>2014-07-28T15:19:09Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2014-07-12T13:24:03Z</published>
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<id>urn:sha1:f510aeae689925a660bff14683eef4147785d271</id>
<content type='text'>
The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.

This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last* thing u-boot executes
  before entering the payload
- performing an exception return from secure mode directly into
  the payload
- allowing the code to be dynamically relocated to secure RAM
  before switching to non-secure.

This involves quite a bit of horrible code, specially as u-boot
relocation is quite primitive.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Ian Campbell &lt;ijc@hellion.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: HYP/non-sec: move switch to non-sec to the last boot phase</title>
<updated>2014-07-28T15:05:59Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2014-07-12T13:23:58Z</published>
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<id>urn:sha1:c19e0dd7412f5c4bce8c5057c40e747b1acb39e2</id>
<content type='text'>
Having the switch to non-secure in the "prep" phase is causing
all kind of troubles, as that stage can be called multiple times.

Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Ian Campbell &lt;ijc@hellion.org.uk&gt;
</content>
</entry>
<entry>
<title>bootstage: arm: fix fdt stashing code</title>
<updated>2014-04-07T21:03:13Z</updated>
<author>
<name>Mela Custodio</name>
<email>sessyargc@gmail.com</email>
</author>
<published>2014-02-19T15:16:56Z</published>
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<id>urn:sha1:91290cf728dd871c86f370119899789398d956af</id>
<content type='text'>
The conditional is using a variable that is not defined.

Signed-off-by: Rommel G Custodio &lt;sessyargc+u-boot@gmail.com&gt;
</content>
</entry>
<entry>
<title>armv8: Flush dcache before switching to EL2</title>
<updated>2014-04-07T20:19:00Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-03-31T21:40:32Z</published>
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<id>urn:sha1:88590148fa8b7e2d7ca910a7a03b5c5700af58e4</id>
<content type='text'>
For ARMv8, U-boot has been running at EL3 with cache and MMU enabled.
Without proper setup for EL2, cache and MMU are both disabled (out of
reset). Before switching, we need to flush the dcache to make sure the
data is in the main memory.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
Acked-by: David.Feng &lt;fenghua@phytium.com.cn&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2014-01-10T15:56:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-01-10T15:56:00Z</published>
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<id>urn:sha1:7f673c99c2d8d1aa21996c5b914f06d784b080ca</id>
<content type='text'>
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.

Conflicts:
	include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>arm64: core support</title>
<updated>2014-01-09T15:08:44Z</updated>
<author>
<name>David Feng</name>
<email>fenghua@phytium.com.cn</email>
</author>
<published>2013-12-14T03:47:35Z</published>
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<id>urn:sha1:0ae7653128c80a4f2920cbe9b124792c2fd9d9e0</id>
<content type='text'>
Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;

Signed-off-by: David Feng &lt;fenghua@phytium.com.cn&gt;
</content>
</entry>
<entry>
<title>common/cmd_bootm: extend do_bootm_vxworks to support the new VxWorks boot interface.</title>
<updated>2013-12-16T13:59:05Z</updated>
<author>
<name>Miao Yan</name>
<email>miao.yan@windriver.com</email>
</author>
<published>2013-11-28T09:51:38Z</published>
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<id>urn:sha1:871a57bb817a7f4129d924d72f308228180c49ef</id>
<content type='text'>
The next version VxWorks adopts device tree (for PowerPC and ARM) as its hardware
description mechanism. For PowerPC, the boot interface conforms to
the ePAPR standard, which is:

   void (*kernel_entry)(ulong fdt_addr,
          ulong r4 /* 0 */,
          ulong r5 /* 0 */,
          ulong r6 /* EPAPR_MAGIC */, ulong r7 /* IMA size */,
          ulong r8 /* 0 */, ulong r9 /* 0 */)

For ARM, the boot interface is:

   void (*kernel_entry)(void *fdt_addr)

Signed-off-by: Miao Yan &lt;miao.yan@windriver.com&gt;
[trini: Fix build error when !CONFIG_OF_FDT is set, typo on PowerPC,
missing extern ft_fixup_num_cores]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: extend non-secure switch to also go into HYP mode</title>
<updated>2013-10-03T19:28:55Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@linaro.org</email>
</author>
<published>2013-09-19T16:06:45Z</published>
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<id>urn:sha1:d4296887544ddf95808bfb62f312008f519efb7b</id>
<content type='text'>
For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.

While doing the non-secure switch, we have to enable the HVC
instruction and setup the HYP mode HVBAR (while still secure).

The actual switch is done by dropping back from a HYP mode handler
without actually leaving HYP mode, so we introduce a new handler
routine in our new secure exception vector table.

In the assembly switching routine we save and restore the banked LR
and SP registers around the hypercall to do the actual HYP mode
switch.

The C routine first checks whether we are in HYP mode already and
also whether the virtualization extensions are available. It also
checks whether the HYP mode switch was finally successful.
The bootm command part only calls the new function after the
non-secure switch.

Signed-off-by: Andre Przywara &lt;andre.przywara@linaro.org&gt;
</content>
</entry>
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