u-boot.git/arch/arm/lib/cache-pl310.c, branch v2012.07 Unnamed repository; edit this file 'description' to name the repository. armv7: cache: remove flush on un-aligned invalidate 2011-09-04T09:36:16+00:00 Aneesh V aneesh@ti.com 2011-08-11T04:35:45+00:00 cabe2878a8201441a8aa4c482acb568f9ca137f0 Remove the flush of boundary cache-lines done as part of invalidate on a non cache-line boundary aligned buffer Also, print a warning when this situation is recognized. Signed-off-by: Aneesh V <aneesh@ti.com> 
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer

Also, print a warning when this situation is recognized.

Signed-off-by: Aneesh V <aneesh@ti.com>
armv7: add PL310 support to u-boot 2011-07-04T08:55:25+00:00 Aneesh V aneesh@ti.com 2011-06-16T23:30:51+00:00 93bc21930a1bfbc98e3121035207eafa427ee07f PL310 is the L2$ controller from ARM used in many SoCs including the Cortex-A9 based OMAP4430 Add support for some of the key PL310 operations - Invalidate all - Invalidate range - Flush(clean & invalidate) all - Flush range Signed-off-by: Aneesh V <aneesh@ti.com> 
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430

Add support for some of the key PL310 operations
	- Invalidate all
	- Invalidate range
	- Flush(clean & invalidate) all
	- Flush range

Signed-off-by: Aneesh V <aneesh@ti.com>