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<title>u-boot.git/arch/arm/lib/cache.c, branch v2014.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib/cache.c?h=v2014.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib/cache.c?h=v2014.04'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2013-07-24T13:44:38Z</updated>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a4596601fd395f3afb8f82f3f840c5e00bdd57a'/>
<id>urn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: Remove OMAP2420H4 and all omap24xx support</title>
<updated>2013-06-10T12:43:19Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-06-04T12:02:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7f5eef93af92ed9efed7867d24b03fd6056a7404'/>
<id>urn:sha1:7f5eef93af92ed9efed7867d24b03fd6056a7404</id>
<content type='text'>
The omap2420H4 was the only mainline omap24xx board.  Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time.  Remove this board as there's not been interest in
it in U-Boot for quite a long time.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: do not force d-cache enable on all boards</title>
<updated>2011-09-04T09:36:16Z</updated>
<author>
<name>Aneesh V</name>
<email>aneesh@ti.com</email>
</author>
<published>2011-08-16T04:33:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cba4b1809f043bf85c806e5a4e342f62bd5ded45'/>
<id>urn:sha1:cba4b1809f043bf85c806e5a4e342f62bd5ded45</id>
<content type='text'>
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.

Also add some documentation for cache usage in ARM.

Signed-off-by: Aneesh V &lt;aneesh@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: minor fixes for cache and mmu handling</title>
<updated>2011-07-04T08:55:25Z</updated>
<author>
<name>Aneesh V</name>
<email>aneesh@ti.com</email>
</author>
<published>2011-06-16T23:30:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e05f00792b71184428fdb34a303644a1e457f000'/>
<id>urn:sha1:e05f00792b71184428fdb34a303644a1e457f000</id>
<content type='text'>
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
   than a range flush on the entire memory(flush_cache())

   Provide a default implementation for flush_dcache_all()
   for backward compatibility and to avoid build issues.

Signed-off-by: Aneesh V &lt;aneesh@ti.com&gt;
</content>
</entry>
<entry>
<title>armv7: integrate cache maintenance support</title>
<updated>2011-07-04T08:55:25Z</updated>
<author>
<name>Aneesh V</name>
<email>aneesh@ti.com</email>
</author>
<published>2011-06-16T23:30:49Z</published>
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<id>urn:sha1:c2dd0d45540397704de9b13287417d21049d34c6</id>
<content type='text'>
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
	- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
	- Make changes according to the new framework

Signed-off-by: Aneesh V &lt;aneesh@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: make default implementation of cache_flush() weakly linked</title>
<updated>2011-07-04T08:55:25Z</updated>
<author>
<name>Aneesh V</name>
<email>aneesh@ti.com</email>
</author>
<published>2011-06-16T23:30:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4c93da7c392737f2036130c240e2b4bea773d703'/>
<id>urn:sha1:4c93da7c392737f2036130c240e2b4bea773d703</id>
<content type='text'>
make default implementation of cache_flush() weakly linked so that
sub-architectures can override it

Signed-off-by: Aneesh V &lt;aneesh@ti.com&gt;
</content>
</entry>
<entry>
<title>ARMV7: Fix build for non-OMAP3 boards</title>
<updated>2010-11-04T19:27:02Z</updated>
<author>
<name>Steve Sakoman</name>
<email>steve@sakoman.com</email>
</author>
<published>2010-10-21T05:00:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8345fb242c952b2bb993ac43ecc53eac0108f80c'/>
<id>urn:sha1:8345fb242c952b2bb993ac43ecc53eac0108f80c</id>
<content type='text'>
Commit c3d3a54 uses CONFIG_ARMV7 to determine whether to call the
v7_flush_cache_all function.  This breaks the build for all non-OMAP3
boards (like Panda and OMAP4430SDP) since there is only a v7_flush_cache_all
implementation for OMAP3.

This patch uses CONFIG_OMAP3XXX instead of CONFIG_ARMV7 so that only boards
with a v7_flush_cache_all will make the call.

Tested on Beagle, Overo, Panda, and OMAP4430SDP

Signed-off-by: Steve Sakoman &lt;steve.sakoman@linaro.org&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>armv7, beagle: add support for ELF relocations</title>
<updated>2010-10-13T08:12:25Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2010-10-11T12:08:15Z</published>
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<id>urn:sha1:c3d3a5418de3ce01248bb556b4bd3d293c4f9f1e</id>
<content type='text'>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM (ARM11): add data cache support, test on Qong board</title>
<updated>2010-09-19T17:29:51Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2010-09-17T11:10:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e4a9e6dc819b2b3499659ca90e1e9c6d4ca3077'/>
<id>urn:sha1:7e4a9e6dc819b2b3499659ca90e1e9c6d4ca3077</id>
<content type='text'>
Add data cache support for arm1136 systems.

Enable "cache" command on Qong board and test performance.

    Test 1: Loading 127 MB of data from NAND flash into RAM:

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    QONG (ARM11)	177s	95s	43s	= x 4.1

    Test 2: uncompressing a gzipped image from RAM to RAM
            (size compressed: 6.5 MiB, uncompressed: 35 MiB):

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    QONG (ARM11)	1.54s	0.95s	0.18s	= x 8.6

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM V7 (OMAP): add data cache support, test on Beagle board</title>
<updated>2010-09-19T17:29:51Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2010-09-17T11:10:31Z</published>
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<id>urn:sha1:95c6f6d34d4ff23f4d005488d84682eec5fa9ec8</id>
<content type='text'>
Add data cache support for ARM V7 systems. Used cache flush
functions from linux:arch/arm/mm/cache-v7.S developed from
Catalin Marinas.

Enable "cache" command on Beagle board and test performance.

    Test 1: Loading 127 MB of data from NAND flash into RAM:

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    Beagle (Cortex A8)	116s	106s	30.3s	= x 3.8

    Test 2: uncompressing a gzipped image from RAM to RAM
            (size compressed: 6.5 MiB, uncompressed: 35 MiB):

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    Beagle (Cortex A8)	1.84s	1.64s	0.12s	= x 15.3

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Ben Gardiner&lt;bengardiner@nanometrics.ca&gt;
</content>
</entry>
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