<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/lib/semihosting.S, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib/semihosting.S?h=main</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib/semihosting.S?h=main'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2026-04-13T23:34:02Z</updated>
<entry>
<title>arm: Add ARMv8-M aarch32 support</title>
<updated>2026-04-13T23:34:02Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-03-29T23:14:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b0d731d9563cd6fb8bd6c8304065e550d97a22c7'/>
<id>urn:sha1:b0d731d9563cd6fb8bd6c8304065e550d97a22c7</id>
<content type='text'>
Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.

Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.

To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Acked-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: semihosting: Fix returning from traps on ARMv6 and lower</title>
<updated>2023-11-10T17:52:28Z</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@seco.com</email>
</author>
<published>2023-10-27T20:40:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6ef83ab6be8978ab85a7d8967e9585ddf5f2bbbd'/>
<id>urn:sha1:6ef83ab6be8978ab85a7d8967e9585ddf5f2bbbd</id>
<content type='text'>
U-Boot runs in supervisor mode. On ARMv6 and lower, software interrupts
are taken in supervisor mode. When entering an interrupt, the link
register is set to the address of the next instruction. However, if we
are already in supervisor mode, this clobbers the link register. The
debugger can't help us, since by the time it notices we've taken a
software interrupt, the link register is already gone. Work around this
by moving the return address to another register.

Signed-off-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</content>
</entry>
<entry>
<title>arm: semihosting: replace inline assembly with assembly file</title>
<updated>2023-03-06T22:06:17Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2023-02-07T15:21:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=29c579a2493a1c5de162a724e05521099b66bedb'/>
<id>urn:sha1:29c579a2493a1c5de162a724e05521099b66bedb</id>
<content type='text'>
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
  to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
  we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
  those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
  pointer land in the right registers.

This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</content>
</entry>
</feed>
