u-boot.git/arch/arm/lib, branch v2016.09

arm: cache: always flush cache line size for page table

2016-08-26T21:04:56+00:00

The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.

Signed-off-by: Stefan Agner 
Tested-by: Fabio Estevam 
Reviewed-by: Simon Glass 
Reviewed-by: Heiko Schocher

arm: cache: add support for LPAE for region D$ behavior

2016-08-26T21:04:56+00:00

Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.

Signed-off-by: Stefan Agner

ARM: Move SYS_CACHELINE_SIZE over to Kconfig

2016-08-26T21:04:46+00:00

This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
cases we are mirroring the values used by the Linux Kernel here.  Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.

Cc: Albert Aribaud 
Cc: Marek Vasut 
Cc: Stefano Babic 
Cc: Prafulla Wadaskar 
Cc: Luka Perkov 
Cc: Stefan Roese 
Cc: Nagendra T S 
Cc: Vaibhav Hiremath 
Acked-by: Lokesh Vutla 
Cc: Steve Rae 
Cc: Igor Grinberg 
Cc: Nikita Kiryanov 
Cc: Stefan Agner 
Acked-by: Heiko Schocher 
Cc: Mateusz Kulikowski 
Cc: Peter Griffin 
Acked-by: Paul Kocialkowski 
Cc: Anatolij Gustschin 
Acked-by: "Pali Rohár" 
Cc: Adam Ford 
Cc: Steve Sakoman 
Cc: Grazvydas Ignotas 
Cc: Nishanth Menon 
Cc: Stephen Warren 
Cc: Robert Baldyga 
Cc: Minkyu Kang 
Cc: Thomas Weber 
Cc: Masahiro Yamada 
Cc: David Feng 
Cc: Alison Wang 
Cc: Michal Simek 
Cc: Simon Glass 
Cc: York Sun 
Cc: Shengzhou Liu 
Cc: Mingkai Hu 
Cc: Prabhakar Kushwaha 
Cc: Aneesh Bansal 
Cc: Saksham Jain 
Cc: Qianyu Gong 
Cc: Wang Dongsheng 
Cc: Alex Porosanu 
Cc: Hongbo Zhang 
Cc: tang yuantian 
Cc: Rajesh Bhagat 
Cc: Josh Wu 
Cc: Bo Shen 
Cc: Viresh Kumar 
Cc: Hannes Schmelzer 
Cc: Thomas Chou 
Cc: Joe Hershberger 
Cc: Sam Protsenko 
Cc: Bin Meng 
Cc: Christophe Ricard 
Cc: Anand Moon 
Cc: Beniamino Galvani 
Cc: Carlo Caione 
Cc: huang lin 
Cc: Sjoerd Simons 
Cc: Xu Ziyuan 
Cc: "jk.kernel@gmail.com" 
Cc: "Ariel D'Alessandro" 
Cc: Kever Yang 
Cc: Samuel Egli 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Hans de Goede 
Cc: Ian Campbell 
Cc: Siarhei Siamashka 
Cc: Boris Brezillon 
Cc: Andre Przywara 
Cc: Bernhard Nortmann 
Cc: Wolfgang Denk 
Cc: Ben Whitten 
Cc: Tom Warren 
Cc: Alexander Graf 
Cc: Sekhar Nori 
Cc: Vitaly Andrianov 
Cc: "Andrew F. Davis" 
Cc: Murali Karicheri 
Cc: Carlos Hernandez 
Cc: Ladislav Michl 
Cc: Ash Charles 
Cc: Mugunthan V N 
Cc: Daniel Allred 
Cc: Gong Qianyu 
Signed-off-by: Tom Rini 
Acked-by: Masahiro Yamada 
Acked-by: Chin Liang See 
Tested-by: Stephen Warren 
Acked-by: Paul Kocialkowski

cmd: Split 'bootz' and 'booti' out from 'bootm'

2016-08-20T15:35:07+00:00

The bootz and booti commands rely on common functionality that is found
in common/bootm.c and common/bootm_os.c.  They do not however rely on
the rest of cmd/bootm.c to be implemented so split them into their own
files.  Have various Makefiles include the required infrastructure for
CONFIG_CMD_BOOT[IZ] as well as CONFIG_CMD_BOOTM.  Move the declaration
of 'images' over to common/bootm.c.

Cc: Masahiro Yamada 
Signed-off-by: Tom Rini

vexpress: Check TC2 firmware support before defaulting to nonsec booting

2016-08-15T22:46:38+00:00

The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.

Signed-off-by: Jon Medhurst 
Reviewed-by: Ryan Harkin 
Tested-by: Ryan Harkin

ARM: Rework and correct barrier definitions

2016-08-05T11:23:57+00:00

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions.  This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things.  First,  now becomes the source of isb/dsb/dmb
definitions.  This however introduces another complexity.  Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form.  Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it.  Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier.  The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren 
Tested-by: Stephen Warren 
Acked-by: Ziyuan Xu 
Acked-by: Sandy Patterson 
Reported-by: Ziyuan Xu 
Reported-by: Sandy Patterson 
Signed-off-by: Tom Rini

Merge git://git.denx.de/u-boot-fsl-qoriq

2016-08-03T00:45:24+00:00

arm/PSCI: Add support for creating ARMv7 PSCI version 1.0 DT node

2016-08-02T16:50:00+00:00

Signed-off-by: Hou Zhiqiang 
Reviewed-by: York Sun

arm/PSCI: Fixed the backward compatiblity issue

2016-08-02T16:47:49+00:00

Appended the compatible strings of old version PSCI to the latest
version supported. And there are some psci functions' property must
be added to DT only for psci version 0.1, including cpu_on, cpu_off,
cpu_suspend, migrate.

Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: York Sun

arm/PSCI: Removed unused code

2016-08-02T16:47:35+00:00

Identify the PSCI node only by its name, so removed the code finding
it by compatible string.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: York Sun