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<title>u-boot.git/arch/arm/lib, branch v2017.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib?h=v2017.03</id>
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<updated>2017-03-10T00:52:14Z</updated>
<entry>
<title>do_smhload: fix return code</title>
<updated>2017-03-10T00:52:14Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2017-03-02T17:45:16Z</published>
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<id>urn:sha1:072c8c4cedad87c4be4edca259e1760d7db42e1b</id>
<content type='text'>
do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.

Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>armv8: spl: Call spl_relocate_stack_gd for ARMv8</title>
<updated>2017-03-02T02:28:34Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-03-01T20:04:15Z</published>
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<id>urn:sha1:7a70c9985ccf2e7e0016b32c367a922e01b6c1fb</id>
<content type='text'>
As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm64: fix comment in relocate_64.S</title>
<updated>2017-02-08T21:24:27Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-02-04T03:30:06Z</published>
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<id>urn:sha1:1f4f5e52e5afba8c1be15b9f6be187ad016f03e9</id>
<content type='text'>
There are two typos in the comment "invalide i-cache is enabled".
We can fix it by
  invalide -&gt; invalidate
  is       -&gt; if

Or, if we want to match the comment to the code, we can say
"skip invalidating i-cache if disabled".

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm64: use store with auto-increment</title>
<updated>2017-02-08T14:17:31Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-01-27T07:15:30Z</published>
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<id>urn:sha1:07a63c7e7de28ddc6cdc7d8c1e75a69b35dc6332</id>
<content type='text'>
Save one instruction.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm64: use xzr to zero-out the bss section</title>
<updated>2017-02-08T14:17:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-01-27T07:15:29Z</published>
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<id>urn:sha1:b913c3f0790a4785b2cf0afa49d4c3e4ffddc2cd</id>
<content type='text'>
AArch64 has a zero register (xzr).  Use it instead of x2.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ARM: Default to using optimized memset and memcpy routines</title>
<updated>2017-01-20T20:38:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-12T18:16:02Z</published>
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<id>urn:sha1:40d5534cff720d566cd52f532f26eea2bd86c1ae</id>
<content type='text'>
We have long had available optimized versions of the memset and memcpy
functions that are borrowed from the Linux kernel.  We should use these
in normal conditions as the speed wins in many workflows outweigh the
relatively minor size increase.  However, we have a number of places
where we're simply too close to size limits in SPL and must be able to
make the size vs performance trade-off in those cases.

Cc: Philippe Reynes &lt;tremyfr@yahoo.fr&gt;
Cc: Eric Jarrige &lt;eric.jarrige@armadeus.org&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Magnus Lilja &lt;lilja.magnus@gmail.com&gt;
Cc: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Cc: Chander Kashyap &lt;k.chander@samsung.com&gt;
Cc: Akshay Saraswat &lt;akshay.s@samsung.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2017-01-19T17:22:23Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-19T17:22:23Z</published>
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<id>urn:sha1:0675f992dbf4a785a05a1baf149c2bce6aa5fe90</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARMv8/sec_firmware: relocated and renamed the config FSL_PPA_ARMV8_PSCI</title>
<updated>2017-01-18T17:39:51Z</updated>
<author>
<name>Hou Zhiqiang</name>
<email>Zhiqiang.Hou@nxp.com</email>
</author>
<published>2017-01-16T09:31:48Z</published>
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<id>urn:sha1:daa926448c95ae758400737d87fad288ec7077e2</id>
<content type='text'>
Moved the config FSL_PPA_ARMV8_PSCI from fsl-layerscape's Kconfig to
Kconfig under armv8 and renamed it to SEC_FIRMWARE_ARMV8_PSCI.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: aarch64: Fix the warning about x1-x3 nonzero issue</title>
<updated>2017-01-18T17:29:33Z</updated>
<author>
<name>Alison Wang</name>
<email>b18965@freescale.com</email>
</author>
<published>2017-01-17T01:39:17Z</published>
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<id>urn:sha1:7c5e1feb1d780cc857632c246e78ac7a8e6cf2d7</id>
<content type='text'>
For 64-bit kernel, there is a warning about x1-x3 nonzero in violation
of boot protocol. To fix this issue, input argument 4 is added for
armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will
be set to the right value, such as zero.

Signed-off-by: Alison Wang &lt;alison.wang@nxp.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>ARM: boot0 hook: remove macro, include whole header file</title>
<updated>2017-01-04T15:37:41Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2017-01-02T11:48:34Z</published>
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<id>urn:sha1:ce62e57fc57177352a02b76dace0173bd13404b6</id>
<content type='text'>
For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickly gets messy with this approach,
so let's just drop that intermediate macro and let the #include actually
insert the code directly.
This converts the callers and the callees, but doesn't change anything
at this point.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Steve Rae &lt;steve.rae@raedomain.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
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