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<title>u-boot.git/arch/arm/lib, branch v2019.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/lib?h=v2019.01</id>
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<updated>2018-12-02T20:59:36Z</updated>
<entry>
<title>arm: efi: Generate Microsoft PE format compliant images</title>
<updated>2018-12-02T20:59:36Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-10-02T14:39:33Z</published>
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<id>urn:sha1:fb8ebf52a4518e9355957b8815b0493e7900170d</id>
<content type='text'>
Per Microsoft PE Format documentation [1], PointerToSymbolTable and
NumberOfSymbols should be zero for an image in the COFF file header.
Currently the COFF file header is hardcoded on ARM and these two
members are not zero.

This updates the hardcoded structure to clear these two members, as
well as setting the flag IMAGE_FILE_LOCAL_SYMS_STRIPPED so that we
can generate compliant *.efi images.

[1] https://docs.microsoft.com/zh-cn/windows/desktop/Debug/pe-format

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>arm: Make arch specific memcpy thumb-safe.</title>
<updated>2018-11-16T21:51:57Z</updated>
<author>
<name>Klaus Goger</name>
<email>klaus.goger@theobroma-systems.com</email>
</author>
<published>2018-04-26T18:18:10Z</published>
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<id>urn:sha1:ba08afe8377ac72f834f8baad38e9631957b2ea8</id>
<content type='text'>
The current arch implementation of memcpy cannot be called
from thumb code, because it does not use bx instructions on return.
This patch addresses that. Note, that this patch does not touch
the hot loop of memcpy, so performance is not affected.

Tested on MXS (arm926ejs) with and without thumb-mode enabled.

Signed-off-by: Klaus Goger &lt;klaus.goger@theobroma-systems.com&gt;
Signed-off-by: Christoph Muellner &lt;christoph.muellner@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'signed-efi-2018.11' of git://github.com/agraf/u-boot</title>
<updated>2018-10-17T11:20:52Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-10-17T11:20:52Z</published>
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<id>urn:sha1:e3beca3a2fe172ca707a0e70310f9f7ebd3b3f0f</id>
<content type='text'>
Patch queue for efi - 2018-10-17

A few bug fixes for the 2018.11 release:

  - Fix block seeking on 32bit
  - Fix execution with DEBUG set
  - Fix a few Coverity found bugs
  - Fix warnings

Heinrich Schuchardt (13):
      efi_loader: fix relocation on x86_64
      efi_loader: correct signature of GetPosition, SetPosition
      efi_loader: execute efi_save_gd() first
      efi_loader: efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, ...)
      efi_loader: error handling in read_console()
      efi_loader: return type efi_console_register()
      efi_loader: superfluous statement in is_dir()
      efi_loader: memory leak in efi_set_variable()
      efi_loader: remove lcd.h from efi_net.c
      arm: do not include efi_loader.h twice
      efi_loader: fix typo in efi_boottime.c
      efi_selftest: creating new handle in controller test
      efi_loader: efi_dp_get_next_instance() superfluous statement

Tom Rini (2):
      efi_loader: Fix warning in efi_load_image()
      fs: fat: Fix warning in normalize_longname()
</content>
</entry>
<entry>
<title>arm: do not include efi_loader.h twice</title>
<updated>2018-10-16T14:41:01Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2018-10-01T03:03:30Z</published>
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<id>urn:sha1:b417d475b28164e12a6351390f234ed49ec14c0e</id>
<content type='text'>
We should not include the same include twice.

Fixes: 99b8db7291ce ("arm: print information about loaded UEFI images")
Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>arm64: gic: Do gicv3 secure initialization based on EL level</title>
<updated>2018-10-16T12:58:46Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2017-09-07T07:20:32Z</published>
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<id>urn:sha1:e6149576e8dab0684e885b206b0fcde0c16402c1</id>
<content type='text'>
Do gic cpu initialization based on EL level which u-boot enters.
U-Boot can't access EL3 regs when runs in EL2/EL1, etc.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm: K3: Update _start instruction</title>
<updated>2018-09-11T12:32:55Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2018-08-27T10:27:10Z</published>
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<id>urn:sha1:f70b72e3533a135d159b182f8037993c802f1853</id>
<content type='text'>
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and
expects to start executing from 0x0. In order to handle this ROM
updates the boot vector of R5 such that first 64 bytes of image load
address are mapped to 0x0.

In this case, it is SPL's responsibility to jump to the proper image
location. So, update the PC with address of reset vector(like how
other exception vectors are handled), instead of branching to reset.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: armv7m: clean up armv7m unified code compilation</title>
<updated>2018-09-11T01:19:33Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2018-08-31T23:57:06Z</published>
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<id>urn:sha1:d22336aad945f8f67e2c985cea9220c3a559b909</id>
<content type='text'>
unified syntax should be selected by config ARM_ASM_UNIFIED

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>arm: armv7m: remove un-necessary If then instruction</title>
<updated>2018-09-11T01:19:33Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2018-08-31T23:39:36Z</published>
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<id>urn:sha1:680223a2da55d365f0bbc7207297fdb8569c30c2</id>
<content type='text'>
With gas option -mimplicit-it=always, IT block is inserted by the assembler
for thumb2.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: PSCI: Enable the PSCI node</title>
<updated>2018-07-26T20:15:30Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2018-06-22T19:03:18Z</published>
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<id>urn:sha1:74c69cdcc01694b9c08194f2c0fc49f53e766810</id>
<content type='text'>
When fixing up the DT to report PSCI support, explicitly enable the node.
DTs may ship with the node disabled in case a PSCI implementation is not
present, and expect any PSCI implementation to enable the node if they are
actually present.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: PSCI: Support PSCI v0.2</title>
<updated>2018-07-26T20:15:30Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2018-06-22T19:03:17Z</published>
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<id>urn:sha1:326bd726d022f2be57ce9cd86f41130a0097beb6</id>
<content type='text'>
Enhance the PSCI DT editing code to allow setting a PSCI v0.2 compatible
value in the DT. The CONFIG_ option is added to the whitelist to match the
existing PSCI_1_0 option. While not adding new options to Kconfig isn't
ideal, I figure it's better to keep related options together.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
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