u-boot.git/arch/arm/lib, branch v2023.07

arm64: interrupts: print FAR_ELx on sync exceptions

2023-04-25T19:31:27Z

Default synchronous exceptions handler prints only esr and register dump. Sometimes it requiers to see an address which caused exceptions to understand what's going on ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or 0x35. Same applies for EL1. This patch adds function whivh determine current EL, gets correct FAR register and prints it on panic. Signed-off-by: Pavel Skripkin

arm: lib: add __gnu_thumb1_case_si

2023-04-06T23:10:08Z

The assembly for __gnu_thumb1_case_si was taken from upstream gcc and adapted as width suffix was removed for the add instruction [1]. Signed-off-by: Francis Laniel Tested-by: Tony Dinh [1] https://github.com/gcc-mirror/gcc/blob/4f181f9c7ee3efc509d185fdfda33be9018f1611/libgcc/config/arm/lib1funcs.S#L2156 Acked-by: Pali Rohár Acked-by: Tony Dinh

Merge branch 'master' into next

2023-03-27T19:19:57Z

console: Use flush() before panic and reset

2023-03-22T16:51:08Z

To make sure the panic and the reset messages will go out, console flush() should be used. Sleep periods do not work in early u-boot phase when timer driver is not initialized yet. Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html Signed-off-by: Tony Dinh Reviewed-by: Simon Glass Reviewed-by: Stefan Roese

arm: semihosting: replace inline assembly with assembly file

2023-03-06T22:06:17Z

So far we used inline assembly to inject the actual instruction that triggers the semihosting service. While this sounds elegant, as it's really only about one instruction, it has some serious downsides: - We need some barriers in place to force the compiler to issue writes to a data structure before issuing the trap instruction. - We need to convince the compiler to actually fill the structures that we use pointers to. - We need a memory clobber to avoid the compiler caching the data in those structures, when semihosting writes data back. - We need register arguments to make sure the function ID and the pointer land in the right registers. This is all doable, but fragile and somewhat cumbersome. Since we now have a separate function in an extra file anyway, we can do away with all the magic and just write that in an actual assembly file. This is much more readable and robust. Signed-off-by: Andre Przywara Reviewed-by: Sean Anderson

arm64: Initialize TLB memory if CMO_BY_VA_ONLY

2023-03-06T22:03:55Z

Memory used to hold the page tables is allocated from the top of RAM with no prior initialization and could therefore hold invalid data. As invalidate_dcache_all() will be called before the MMU has been initialized and as that function relies indirectly on the page tables when using CMO_BY_VA_ONLY, these must be in a valid state from their allocation. Signed-off-by: Pierre-Clément Tosi [ Paul: pick from the Android tree. Fix checkpatch warnings, and rebased to the upstream. ] Signed-off-by: Ying-Chun Liu (PaulLiu) Cc: Tom Rini Link: https://android.googlesource.com/platform/external/u-boot/+/e3ceef4230b772186c6853cace4a676a407e6ab7

Correct SPL uses of SAVE_PREV_BL_INITRAMFS_START_ADDR

2023-02-10T12:41:40Z

This converts 2 usages of this option to the non-SPL form, since there is no SPL_SAVE_PREV_BL_INITRAMFS_START_ADDR defined in Kconfig Signed-off-by: Simon Glass

Correct SPL uses of SAVE_PREV_BL_FDT_ADDR

2023-02-10T12:41:40Z

This converts 2 usages of this option to the non-SPL form, since there is no SPL_SAVE_PREV_BL_FDT_ADDR defined in Kconfig Signed-off-by: Simon Glass

Correct SPL uses of LMB

2023-02-10T12:41:39Z

This converts 9 usages of this option to the non-SPL form, since there is no SPL_LMB defined in Kconfig Signed-off-by: Simon Glass

arm: Drop CONFIG_MMU

2023-02-07T19:33:48Z

This option does not exist, so the #ifdefs do nothing. Drop this code. Signed-off-by: Simon Glass