u-boot.git/arch/arm/lib, branch v2024.01

spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN

2023-10-06T18:38:12Z

Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the malloc pool exists. Signed-off-by: Simon Glass Reviewed-by: Sean Anderson

common: Drop linux/printk.h from common header

2023-09-24T13:54:57Z

This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass

Merge tag 'v2023.10-rc3' into next

2023-08-21T21:32:17Z

Prepare v2023.10-rc3 Signed-off-by: Tom Rini

arm: Use builtins for ffs/fls

2023-08-17T20:39:20Z

Since ARMv5, the clz instruction allows for efficient implementation of ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is only available in ARM mode. LTO makes it difficult to force specific functions to be in ARM mode, as it is effectively a form of very aggressive inlining. To work around this, fls/ffs are implemented in assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode. Overall, this saves around 75 bytes per call. This code is synced with v5.15 of the Linux kernel. Signed-off-by: Sean Anderson Reviewed-by: Tom Rini

arm64: smccc: add support for SMCCCv1.2 x0-x17 registers

2023-08-08T14:22:03Z

add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi Reviewed-by: Ilias Apalodimas Reviewed-by: Jens Wiklander Reviewed-by: Simon Glass Cc: Tom Rini

Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"

2023-07-24T23:51:05Z

This reverts commit d927d1a80843e1c3e2a3f0b8f6150790bef83da1, reversing changes made to c07ad9520c6190070513016fdb495d4703a4a853. These changes do not pass CI currently. Signed-off-by: Tom Rini

arm64: smccc: add support for SMCCCv1.2 x0-x17 registers

2023-07-24T19:30:02Z

arm64: interrupts: print FAR_ELx on sync exceptions

2023-04-25T19:31:27Z

Default synchronous exceptions handler prints only esr and register dump. Sometimes it requiers to see an address which caused exceptions to understand what's going on ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or 0x35. Same applies for EL1. This patch adds function whivh determine current EL, gets correct FAR register and prints it on panic. Signed-off-by: Pavel Skripkin

arm: lib: add __gnu_thumb1_case_si

2023-04-06T23:10:08Z

The assembly for __gnu_thumb1_case_si was taken from upstream gcc and adapted as width suffix was removed for the add instruction [1]. Signed-off-by: Francis Laniel Tested-by: Tony Dinh [1] https://github.com/gcc-mirror/gcc/blob/4f181f9c7ee3efc509d185fdfda33be9018f1611/libgcc/config/arm/lib1funcs.S#L2156 Acked-by: Pali Rohár Acked-by: Tony Dinh

Merge branch 'master' into next

2023-03-27T19:19:57Z