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<title>u-boot.git/arch/arm/lib, branch v2025.07</title>
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<updated>2025-04-23T19:19:44Z</updated>
<entry>
<title>arm: add initjmp()</title>
<updated>2025-04-23T19:19:44Z</updated>
<author>
<name>Jerome Forissier</name>
<email>jerome.forissier@linaro.org</email>
</author>
<published>2025-04-18T14:09:30Z</published>
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<id>urn:sha1:0245d2ab7d08cd360d44f131b20aa817799a4394</id>
<content type='text'>
Implement initjmp() for Arm. a non-standard extension to setjmp()/
longjmp() allowing to initialize a jump buffer with a function pointer
and a stack pointer. This will be useful to later introduce threads.
With this new function it becomes possible to longjmp() to a particular
function pointer (rather than to a point previously reached during
program execution as is the case with setjmp()), and with a custom stack.
Both things are needed to spin off a new thread. Then the usual
setjmp()/longjmp() pair is enough to save and restore a context, i.e.,
switch thread.

Signed-off-by: Jerome Forissier &lt;jerome.forissier@linaro.org&gt;
Acked-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Static initcalls"</title>
<updated>2025-04-14T14:59:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-14T14:59:45Z</published>
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<id>urn:sha1:8c98b57d72d5e5b94ed064fe1041e51216165334</id>
<content type='text'>
Jerome Forissier &lt;jerome.forissier@linaro.org&gt; says:

This series replaces the dynamic initcalls (with function pointers) with
static calls, and gets rid of initcall_run_list(), init_sequence_f,
init_sequence_f_r and init_sequence_r. This makes the code simpler and the
binary slighlty smaller: -2281 bytes/-0.21 % with LTO enabled and -510
bytes/-0.05 % with LTO disabled (xilinx_zynqmp_kria_defconfig).

Execution time doesn't seem to change noticeably. There is no impact on
the SPL.

The inline assembly fixes, although they look unrelated, are triggered
on some platforms with LTO enabled. For example: kirkwood_defconfig.

CI: https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25514

Link: https://lore.kernel.org/r/20250404135038.2134570-1-jerome.forissier@linaro.org
</content>
</entry>
<entry>
<title>arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set</title>
<updated>2025-04-14T14:59:39Z</updated>
<author>
<name>Jerome Forissier</name>
<email>jerome.forissier@linaro.org</email>
</author>
<published>2025-04-04T13:50:35Z</published>
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<id>urn:sha1:6fe50e39508043f386fc1bd40bbc02b8a75c1940</id>
<content type='text'>
The mcr and msr instructions are available in Thumb mode only if
Thumb2 is supported. Therefore, if __thumb2__ is not set, make
sure we switch to ARM mode by inserting a .arm directive in the
inline assembly.

Fixes LTO link errors with kirkwood platforms, triggered by a later
commit:

 tools/buildman/buildman -o /tmp/build -eP sheevaplug
 [...]
 {standard input}:24085: Error: selected processor does not support `mrc p15,0,r3,c1,c0,0' in Thumb mode

Signed-off-by: Jerome Forissier &lt;jerome.forissier@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Switch to using $(PHASE_) in Makefiles"</title>
<updated>2025-04-11T18:16:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-11T18:16:49Z</published>
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<id>urn:sha1:407d68638fe32418d61681407effba2a303bb9ee</id>
<content type='text'>
Tom Rini &lt;trini@konsulko.com&gt; says:

This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.

Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
</content>
</entry>
<entry>
<title>Kbuild: Always use $(PHASE_)</title>
<updated>2025-04-11T18:16:44Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T22:55:23Z</published>
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<id>urn:sha1:302b41d5397e9f821d360a74335e8821d4513970</id>
<content type='text'>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: gic-v3: Scan for subnodes</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2025-03-20T12:51:56Z</published>
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<id>urn:sha1:6554cb460bfc0d1a21406da49bf44f029b5aa185</id>
<content type='text'>
According to the binding [1] the ITS node should be a subnode of the
GICv3 node. Since the ITS node has it's own driver, manually probe for
possible subnodes after binding since dm_scan_fdt() is not recursive.

1: https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic-v3.txt

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
</content>
</entry>
<entry>
<title>Revert "Merge patch series "pxe: Precursor series for supporting read_all() in extlinux / PXE""</title>
<updated>2025-04-07T22:35:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-07T18:35:13Z</published>
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<id>urn:sha1:f892a7f397a66d8d09f418d1e0e06dfb48bac27d</id>
<content type='text'>
This reverts commit 8bc3542384e3a1219e5ffb62b79d16dddc1b1fb9, reversing
changes made to 698edd63eca090a2e299cd3facf90a0b97bed677.

There are still problems with this series to work out.

Link: https://lore.kernel.org/u-boot/CAFLszTjw_MJbK9tpzVYi3XKGazcv55auBAdgVzcAVUta7dRqcg@mail.gmail.com/
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Various toolchain compatibility fixes/improvements"</title>
<updated>2025-04-02T20:34:08Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-02T20:34:08Z</published>
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<id>urn:sha1:8b0fe584ae91b588227d69eb7572f72d8b86a83c</id>
<content type='text'>
Sam Edwards &lt;cfsworks@gmail.com&gt; says:

This is v2 of my "misc. fixes" series, sent to prepare the codebase for more
direct LLVM support in the near future. This series contains several fixes that
I found in the process of preparing that support and which address issues
independent of any future feature or enhancement. I am sending these now, both
so that their inclusion is not delayed by discussion on my upcoming series and
to make the latter more manageable.

Link: https://lore.kernel.org/r/20250315221813.1265193-1-CFSworks@gmail.com
</content>
</entry>
<entry>
<title>arm: riscv: efi: Export _start symbol from crt0_*_efi stubs</title>
<updated>2025-04-02T20:33:50Z</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2025-03-15T22:18:09Z</published>
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<id>urn:sha1:f692540b24a7775e43f1d315d3e13a5d3ed21dd4</id>
<content type='text'>
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since  ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.

However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.

This patch doesn't affect the final output binaries in any way.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
Reviewed-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
</entry>
<entry>
<title>arm: Replace 'adrl' in EFI crt0</title>
<updated>2025-04-02T20:33:50Z</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2025-03-15T22:18:04Z</published>
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<id>urn:sha1:d5734b183c3d578fff1c1e81e46a1d04342edffe</id>
<content type='text'>
LLVM's IAS does not (and cannot easily) support the 'adrl'
pseudoinstruction, and ARM developers generally do not consider it
portable across assembler implementations either.

Instead, expand it into the two subtract instructions it would emit
anyway. An explanation of the math follows:

The .+8 and .+4 refer to the same memory location; this is because the
.+4 expression occurs in a subsequent instruction, 4 bytes after the
first. This memory location is the value of the PC register when it is
read by the first sub instruction. Thus, both inner parenthesized
expressions evaluate to the same result: PC's offset relative to
image_base. The subtract instructions then remove one byte each
(low, then high) of the total offset, thereby getting the absolute
address of image_base loaded in r0.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
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